{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T00:43:48Z","timestamp":1725497028524},"edition-number":"1","reference-count":19,"publisher":"Wiley","isbn-type":[{"type":"print","value":"9780471383932"},{"type":"electronic","value":"9780470050118"}],"license":[{"start":{"date-parts":[[2008,1,15]],"date-time":"2008-01-15T00:00:00Z","timestamp":1200355200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/doi.wiley.com\/10.1002\/tdm_license_1.1"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"abstract":"<jats:title>Abstract<\/jats:title><jats:p>Programmable logic arrays (PLAs) are traditional digital electronic devices. A PLA is a simple programmable logic device (SPLD) used to implement combinational logic circuits. A PLA has a set of programmable AND gates, which link to a set of programmable OR gates to produce an output. The AND\u2013OR layout of a PLA allows for implementing logic functions that are in a sum\u2010of\u2010products form. PLAs are available in the market in different types. PLAs could be stand alone chips, or parts of bigger processing systems. Stand alone PLAs are available as mask programmable (MPLAs) and field programmable (FPLAs) devices. The attractions of PLAs that brought them to mainstream engineers include their simplicity, relatively small circuit area, predictable propagation delay, and ease of development. The powerful\u2010but\u2010simple property brought PLAs to rapid prototyping, synthesis, design optimization techniques, embedded systems, traditional computer systems, hybrid high\u2010performance computing systems, etc. Indeed, there has been renewable interests in working with the simple AND\u2010to\u2010OR PLAs.<\/jats:p>","DOI":"10.1002\/9780470050118.ecse316","type":"other","created":{"date-parts":[[2008,1,15]],"date-time":"2008-01-15T14:46:25Z","timestamp":1200408385000},"source":"Crossref","is-referenced-by-count":1,"title":["Programmable Logic Arrays"],"prefix":"10.1002","author":[{"given":"Issam W.","family":"Damaj","sequence":"first","affiliation":[]}],"member":"311","published-online":{"date-parts":[[2008,1,15]]},"reference":[{"volume-title":"Embedded System Design: A Unified Hardware\/Software Introduction","year":"2002","author":"Vahid F.","key":"e_1_2_9_2_1_1"},{"key":"e_1_2_9_2_2_1","doi-asserted-by":"publisher","DOI":"10.1147\/rd.194.0379"},{"key":"e_1_2_9_2_3_1","unstructured":"Z. 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