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Here, effects of flicker noise and drift on large DL systems are explored using a new flicker\u2010noise model with memory, which preserves temporal correlations, including a flicker noise figure of merit (FOM)  to quantify impacts on system performance. Flicker noise is characterized for  (GST) based phase\u2010change memory (PCM) cells with a discovery of read\u2010noise asymmetry tied to shape asymmetry of mushroom cells. This experimental read polarity dependence is consistent with Pirovano's trap activation and defect annihilation model in an asymmetric GST cell. The impact of flicker noise and resistance drift of analog PCM synaptic devices on deep\u2010learning hardware is assessed for six large\u2010scale deep neural networks (DNNs) used for image classification, finding that the inference top\u20101 accuracy degraded with the accumulated device flicker noise and drift as , and , respectively, where <jats:italic>\u03bd<\/jats:italic> is the drift coefficient. These negative impacts could be mitigated with a new hardware\u2010aware (HWA) (pre)\u2010training of the DNNs, which is applied before programming to the analog arrays.<\/jats:p><\/jats:sec>","DOI":"10.1002\/aisy.202100179","type":"journal-article","created":{"date-parts":[[2022,2,23]],"date-time":"2022-02-23T10:14:47Z","timestamp":1645611287000},"update-policy":"https:\/\/doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":7,"title":["Impact of Phase\u2010Change Memory Flicker Noise and Weight Drift on Analog Hardware Inference for Large\u2010Scale Deep Learning Networks"],"prefix":"10.1002","volume":"4","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-7011-6645","authenticated-orcid":false,"given":"Jin-Ping","family":"Han","sequence":"first","affiliation":[{"name":"IBM T. J. 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