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Herein, a digital in\u2010memory computing method for convolution computing, which holds the key to DNNs, is proposed. Based on the proposed method, a floating gate transistor\u2010based in\u2010memory computing chip for accurate convolution computing with high parallelism is created. The proposed digital in\u2010memory computing method can achieve the central processing unit (CPU)\u2010equivalent precision with the same neural network architecture and parameters, different from the analogue or digital\u2013analogue\u2010mixed in\u2010memory computing techniques. Based on the fabricated floating gate transistor\u2010based in\u2010memory computing chip, a hardware LeNet\u20105 neural network is built. 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