{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,12]],"date-time":"2026-01-12T07:53:18Z","timestamp":1768204398017,"version":"3.49.0"},"reference-count":28,"publisher":"Wiley","issue":"1","license":[{"start":{"date-parts":[[2026,1,5]],"date-time":"2026-01-05T00:00:00Z","timestamp":1767571200000},"content-version":"vor","delay-in-days":4,"URL":"http:\/\/onlinelibrary.wiley.com\/termsAndConditions#vor"}],"content-domain":{"domain":["onlinelibrary.wiley.com"],"crossmark-restriction":true},"short-container-title":["Concurrency and Computation"],"published-print":{"date-parts":[[2026,1]]},"abstract":"<jats:title>ABSTRACT<\/jats:title>\n                  <jats:p>The development of virtual platform frameworks has made it possible to perform early soft error analysis of more realistic multicore systems, that is, real software stacks and state\u2010of\u2010the\u2010art ISAs. Because of the underlying frameworks' strong observability and simulation performance, more error\/failure related data may be generated and collected in a reasonable amount of time even with complicated software stack setups. Parameters (i.e., features) that do not directly connect to the system soft error analysis must be filtered away when working with sizable failure\u2010related data sets that come from several fault campaigns. In this regard, the paper proposes an assessment of multicore processor soft error reliability using BBRO\u2010DNN and SSF\u2010FIS models. At first, source code is converted into the executable code using LLVM compiler and applied over the Gem 5 virtual platform. Then, faults are injected into the fault injection module of the virtual platform. Profiling module analysis the faults and the reaction of the system and submits the report. The fault report is given into the proposed BBRO\u2010DNN model for classifying the fault type. Finally, the system's reliability is evaluated using classified fault type. Experimental results are done by comparing the proposed and existing models to show the superiority of the developed model.<\/jats:p>","DOI":"10.1002\/cpe.70525","type":"journal-article","created":{"date-parts":[[2026,1,5]],"date-time":"2026-01-05T22:41:14Z","timestamp":1767652874000},"update-policy":"https:\/\/doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Assessment of Multicore Processor Soft Error Reliability Using\n                    <scp>BBRO<\/scp>\n                    \u2010\n                    <scp>DNN<\/scp>\n                    and\n                    <scp>SSF<\/scp>\n                    \u2010\n                    <scp>FIS<\/scp>\n                    Models"],"prefix":"10.1002","volume":"38","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-4749-9163","authenticated-orcid":false,"given":"Usha","family":"Jadhav","sequence":"first","affiliation":[{"name":"Department of E&amp;TC Engineering D Y Patil College of Engineering  Pune India"},{"name":"Savitribai Phule Pune University  Pune India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3345-540X","authenticated-orcid":false,"given":"P.","family":"Malathi","sequence":"additional","affiliation":[{"name":"Department of E&amp;TC Engineering D Y Patil College of Engineering  Pune India"},{"name":"Savitribai Phule Pune University  Pune India"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"311","published-online":{"date-parts":[[2026,1,5]]},"reference":[{"key":"e_1_2_10_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/JIOT.2020.3043716"},{"key":"e_1_2_10_3_1","doi-asserted-by":"publisher","DOI":"10.1007\/s11227-021-03650-6"},{"key":"e_1_2_10_4_1","doi-asserted-by":"publisher","DOI":"10.1007\/s12648-023-02644-9"},{"key":"e_1_2_10_5_1","unstructured":"I.Alshaer \u201cCross\u2010Layer Fault Analysis for Microprocessor Architectures (CLAM) \u201d(2023) PhD diss. Universit\u00e9 Grenoble Alpes."},{"key":"e_1_2_10_6_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2023.115010"},{"key":"e_1_2_10_7_1","doi-asserted-by":"crossref","unstructured":"F.Elsabbagh S.Sheikhha V. A.Ying Q. M.Nguyen J. S.Emer andD.Sanchez \u201cAccelerating RTL Simulation With Hardware\u2010Software Co\u2010Design \u201d(2023) Proceedings of the 56th Annual IEEE\/ACM International Symposium on Microarchitecture 153\u2013166.","DOI":"10.1145\/3613424.3614257"},{"key":"e_1_2_10_8_1","unstructured":"S. L.Terol \u201cApplying Hypervisor\u2010Based Fault Tolerance Techniques to Safety\u2010Critical Embedded Systems \u201d(2023) PhD diss. Universidad Carlos III de Madrid."},{"key":"e_1_2_10_9_1","unstructured":"J. J. V.Olmos F.Cugini andP.Reviriego \u201cScalable and Quantum Resilient Heterogeneous Edge Computing Enabling Trustworthy AI (SMARTY) \u201d."},{"key":"e_1_2_10_10_1","doi-asserted-by":"publisher","DOI":"10.3389\/frai.2023.1066049"},{"key":"e_1_2_10_11_1","doi-asserted-by":"crossref","unstructured":"C.L\u00fcbbenandM.\u2010O.Pahl \u201cDistributed Device\u2010Specific Anomaly Detection Using Deep Feed\u2010Forward Neural Networks \u201din NOMS 2023\u20132023 IEEE\/IFIP Network Operations and Management Symposium IIEEE: 2023) 1\u20139.","DOI":"10.1109\/NOMS56928.2023.10154360"},{"key":"e_1_2_10_12_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.envsoft.2023.105776"},{"issue":"12","key":"e_1_2_10_13_1","article-title":"MiAMix: Enhancing Image Classification Through a Multi\u2010Stage Augmented Mixed Sample Data Augmentation Method","volume":"11","author":"Liang W.","year":"2023","journal-title":"Pro"},{"key":"e_1_2_10_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3097981"},{"key":"e_1_2_10_15_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2022.102710"},{"key":"e_1_2_10_16_1","unstructured":"X.XueandC.Liu \u201cAdaptive Soft Error Protection for Deep Learning \u201d(2024) arXiv preprint arXiv:2407.19664."},{"key":"e_1_2_10_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2022.3184274"},{"key":"e_1_2_10_18_1","doi-asserted-by":"crossref","unstructured":"G.Abich R.Garibotti J.Gava R.Reis andL.Ost \u201cImpact of Thread Parallelism on the Soft Error Reliability of Convolution Neural Networks \u201din 2022 IEEE 13th Latin America Symposium on Circuits and System (LASCAS)(IEEE: 2022) 1\u20134.","DOI":"10.1109\/LASCAS53948.2022.9789088"},{"key":"e_1_2_10_19_1","doi-asserted-by":"crossref","unstructured":"G.Abich J.Gava R.Reis andL.Ost \u201cSoft Error Reliability Assessment of Neural Networks on Resource\u2010Constrained IoT Devices \u201d2020 27th IEEE International Conference on Electronics Circuits and Systems (ICECS)(IEEE: 2020) 1\u20134.","DOI":"10.1109\/ICECS49266.2020.9294951"},{"key":"e_1_2_10_20_1","doi-asserted-by":"crossref","unstructured":"B. F.Goldstein V. C.Ferreira S.Srinivasan et al. \u201cA Lightweight Error\u2010Resiliency Mechanism for Deep Neural Networks \u201din 2021 22nd International Symposium on Quality Electronic Design (ISQED)(IEEE: 2021) 311\u2013316.","DOI":"10.1109\/ISQED51717.2021.9424287"},{"key":"e_1_2_10_21_1","doi-asserted-by":"crossref","unstructured":"Z.Gong H.Ji C. W.Fletcher C. J.Hughes S.Baghsorkhi andJ.Torrellas \u201cSave: Sparsity\u2010Aware Vector Engine for Accelerating Dnn Training and Inference on Cpus \u201din 2020 53rd Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO)(IEEE: 2020) 796\u2013810.","DOI":"10.1109\/MICRO50266.2020.00070"},{"key":"e_1_2_10_22_1","doi-asserted-by":"crossref","unstructured":"F. R.Da Rosa R.Reis andL.Ost \u201cgem5\u2010FIM: A Flexible and Scalable Multicore Soft Error Assessment Framework to Early Reliability Design Space Explorations \u201d2018 IEEE 9th Latin American Symposium on Circuits and Systems (LASCAS)(IEEE: 2018) 1\u20134.","DOI":"10.1109\/LASCAS.2018.8717606"},{"key":"e_1_2_10_23_1","doi-asserted-by":"crossref","unstructured":"F.Rosa L.Ost R.Reis S.Davidmann andL.Lapides \u201cEvaluation of Multicore Systems Soft Error Reliability Using Virtual Platforms \u201din 2017 15th IEEE International New Circuits and Systems Conference (NEWCAS)(IEEE: 2017) 85\u201388.","DOI":"10.1109\/NEWCAS.2017.8010111"},{"key":"e_1_2_10_24_1","doi-asserted-by":"publisher","DOI":"10.32604\/cmc.2022.020775"},{"key":"e_1_2_10_25_1","doi-asserted-by":"crossref","unstructured":"O.Chatzopoulos G.Papadimitriou V.Karakostas andD.Gizopoulos \u201cGem5\u2010Marvel: Microarchitecture\u2010Level Resilience Analysis of Heterogeneous Soc Architectures \u201din 2024 IEEE International Symposium on High\u2010Performance Computer Architecture (HPCA)(IEEE: 2024) 543\u2013559.","DOI":"10.1109\/HPCA57654.2024.00047"},{"key":"e_1_2_10_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2023.3347675"},{"key":"e_1_2_10_27_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2021.114331"},{"key":"e_1_2_10_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2024.3377596"},{"key":"e_1_2_10_29_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2023.103024"}],"container-title":["Concurrency and Computation: Practice and Experience"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1002\/cpe.70525","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,1,12]],"date-time":"2026-01-12T04:49:20Z","timestamp":1768193360000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1002\/cpe.70525"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,1]]},"references-count":28,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2026,1]]}},"alternative-id":["10.1002\/cpe.70525"],"URL":"https:\/\/doi.org\/10.1002\/cpe.70525","archive":["Portico"],"relation":{},"ISSN":["1532-0626","1532-0634"],"issn-type":[{"value":"1532-0626","type":"print"},{"value":"1532-0634","type":"electronic"}],"subject":[],"published":{"date-parts":[[2026,1]]},"assertion":[{"value":"2025-01-28","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2025-12-17","order":2,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2026-01-05","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}],"article-number":"e70525"}}