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The proposed structure enables the implementation of these delays entirely on\u2010chip through the utilization of a provisional oscillator and a set of flip\u2010flops. The optimal number of flip\u2010flops can be determined through an area optimization process. The proposed power\u2010on reset circuit thresholds demonstrate the process, voltage, temperature (PVT) tolerance, facilitated by the use of resistors of the same type. Notably, the thresholds and provided delay for this circuit are supply\u2010rise\u2010time independent. The structure has been implemented in a 0.18\u2010\u03bcm CMOS technology, occupying an active area of 48\u2009\u00d7\u200940\u2009\u03bcm<jats:sup>2<\/jats:sup>.<\/jats:p>","DOI":"10.1002\/cta.4380","type":"journal-article","created":{"date-parts":[[2024,12,9]],"date-time":"2024-12-09T20:51:12Z","timestamp":1733777472000},"page":"5507-5517","update-policy":"https:\/\/doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["A Scalable Delay\u2010Expanding Technique for Low\u2010Area On\u2010Chip Power\u2010On Reset Circuits"],"prefix":"10.1002","volume":"53","author":[{"ORCID":"https:\/\/orcid.org\/0009-0003-4822-2710","authenticated-orcid":false,"given":"Hamid\u00a0Sadat","family":"Mansoury","sequence":"first","affiliation":[{"name":"Department of Electrical Engineering Sharif University of Technology  Tehran Iran"}]},{"given":"Saeed","family":"Saeedi","sequence":"additional","affiliation":[{"name":"Faculty of Electrical and Computer Engineering Tarbiat Modares University  Tehran Iran"}]},{"given":"Mojtaba","family":"Atarodi","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering Sharif University of Technology  Tehran Iran"}]}],"member":"311","published-online":{"date-parts":[[2024,12,9]]},"reference":[{"key":"e_1_2_6_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/tcsii.2011.2168017"},{"key":"e_1_2_6_3_1","unstructured":"Infineon Technologies AG \u201cLow Drop Out Linear Voltage Regulator \u201d TLE4291E datasheet Jun. 2011 [Revised Dec. 2012]."},{"key":"e_1_2_6_4_1","doi-asserted-by":"publisher","DOI":"10.1002\/cta.726"},{"key":"e_1_2_6_5_1","doi-asserted-by":"publisher","DOI":"10.1002\/cta.1918"},{"key":"e_1_2_6_6_1","doi-asserted-by":"crossref","unstructured":"K.Song W.Oh andJ.Choi \u201cA UVLO With Zero Static Power Consumption Power\u2010On Reset Circuit in HVIC \u201d in2017 IEEE Applied Power Electronics Conference and Exposition (APEC)(Tampa FL USA 2017) 1085\u20131089 https:\/\/doi.org\/10.1109\/APEC.2017.7930830.","DOI":"10.1109\/APEC.2017.7930830"},{"key":"e_1_2_6_7_1","doi-asserted-by":"crossref","unstructured":"A.Amaya L. E.Rueda G andE.Roa \u201cA Multi\u2010level Power\u2010On Reset for Fine\u2010Grained Power Management \u201d in2018 28th International Symposium on Power and Timing Modeling Optimization and Simulation (PATMOS)(Platja d'Aro Spain 2018) 129\u2013132 https:\/\/doi.org\/10.1109\/PATMOS.2018.8464167.","DOI":"10.1109\/PATMOS.2018.8464167"},{"key":"e_1_2_6_8_1","doi-asserted-by":"crossref","unstructured":"E.Luis G.Rueda N.Cuevas andE.Roa \u201cAn Ultra\u2010Low Power Multi\u2010level Power\u2010On Reset for Fine\u2010Grained Power Management Strategies \u201d in2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)(Armenia Colombia 2019) 185\u2013188 https:\/\/doi.org\/10.1109\/LASCAS.2019.8667574.","DOI":"10.1109\/LASCAS.2019.8667574"},{"key":"e_1_2_6_9_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2020.104898"},{"key":"e_1_2_6_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/tcsii.2020.3009379"},{"key":"e_1_2_6_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/tcsii.2022.3164454"},{"key":"e_1_2_6_12_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.aeue.2022.154154"},{"key":"e_1_2_6_13_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.aeue.2023.155097"},{"key":"e_1_2_6_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2022.3196287"},{"key":"e_1_2_6_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2024.3383044"},{"key":"e_1_2_6_16_1","doi-asserted-by":"crossref","unstructured":"H.You D.Shi D.Shang Y.Zhou andS.Qiao \u201cA 409mV Sub\u201010nW Power\u2010On Reset Circuit Using Adaptive Accuracy Adjustment for low Voltage Applications \u201d in2024 IEEE International Symposium on Circuits and Systems (ISCAS)(Singapore Singapore 2024) 1\u20135 https:\/\/doi.org\/10.1109\/ISCAS58744.2024.10558131.","DOI":"10.1109\/ISCAS58744.2024.10558131"},{"key":"e_1_2_6_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2023.3309865"},{"key":"e_1_2_6_18_1","doi-asserted-by":"crossref","unstructured":"V. J.Verma A. K.Mishra D.Vaithiyanathan andB.Kaur \u201cReview of Different Flip\u2010Flop Circuits and a Modified Flip\u2010Flop Circuit for Low Voltage Operation \u201d in2022 IEEE 3rd Global Conference for Advancement in Technology (GCAT)(Bangalore India 2022) 1\u20135 https:\/\/doi.org\/10.1109\/GCAT55367.2022.9972133.","DOI":"10.1109\/GCAT55367.2022.9972133"},{"key":"e_1_2_6_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2024.3432162"},{"volume-title":"CMOS VLSI Design: A Circuits and Systems Perspective","year":"2011","author":"Weste N. H. E.","key":"e_1_2_6_20_1"},{"volume-title":"RF Microelectronics","year":"2011","author":"Razavi B.","key":"e_1_2_6_21_1"},{"volume-title":"CMOS Analog Circuit Design","year":"2011","author":"Allen P. E.","key":"e_1_2_6_22_1"},{"key":"e_1_2_6_23_1","unstructured":"Infineon Technologies AG \u201c5\u2010V Low Drop Fixed Voltage Regulator \u201d TLE4271\u20102 datasheet Mar. 2007 [Revised Jul. 2023]."},{"key":"e_1_2_6_24_1","unstructured":"Infineon Technologies AG \u201c5\u2010V Low Drop Fixed Voltage Regulator \u201d TLE4263 datasheet Mar. 2007 [Revised Oct. 2018]."},{"key":"e_1_2_6_25_1","unstructured":"Texas Instruments \u201cLow\u2010Dropout Voltage Regulator With Enable and Power\u2010Good \u201d TPS7A16 datasheet Dec. 2011 [Revised Aug. 2015]."},{"key":"e_1_2_6_26_1","unstructured":"Maxim Integrated \u201c125nA nanoPower Supervisory Circuits With Capacitor\u2010Adjustable Reset and Watchdog Timeouts \u201d MAX16056 datasheet Jun. 2009 [Revised May. 2021]."}],"container-title":["International Journal of Circuit Theory and Applications"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1002\/cta.4380","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,9,8]],"date-time":"2025-09-08T09:51:56Z","timestamp":1757325116000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1002\/cta.4380"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,12,9]]},"references-count":25,"journal-issue":{"issue":"9","published-print":{"date-parts":[[2025,9]]}},"alternative-id":["10.1002\/cta.4380"],"URL":"https:\/\/doi.org\/10.1002\/cta.4380","archive":["Portico"],"relation":{},"ISSN":["0098-9886","1097-007X"],"issn-type":[{"type":"print","value":"0098-9886"},{"type":"electronic","value":"1097-007X"}],"subject":[],"published":{"date-parts":[[2024,12,9]]},"assertion":[{"value":"2024-06-08","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2024-11-13","order":2,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2024-12-09","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}