{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,11]],"date-time":"2025-09-11T19:57:20Z","timestamp":1757620640328,"version":"3.44.0"},"reference-count":44,"publisher":"Wiley","issue":"9","license":[{"start":{"date-parts":[[2024,12,15]],"date-time":"2024-12-15T00:00:00Z","timestamp":1734220800000},"content-version":"vor","delay-in-days":0,"URL":"http:\/\/onlinelibrary.wiley.com\/termsAndConditions#vor"}],"content-domain":{"domain":["onlinelibrary.wiley.com"],"crossmark-restriction":true},"short-container-title":["Circuit Theory &amp; Apps"],"published-print":{"date-parts":[[2025,9]]},"abstract":"<jats:title>ABSTRACT<\/jats:title><jats:p>DC\u2013AC inverters are an important set of power converters when it comes to integration of the renewable energy resources in to the AC grid or to local AC loads. The multilevel inverters (MLIs) are a common and popular choice for such applications. However, MLIs require many switching devices for higher number of voltage levels, multiple isolated DC sources, need for additional charge\u2010balancing circuits for the DC\u2010link capacitor, and unequal voltage stress in the devices at higher power levels. Switched capacitor\u2013based inverters are emerging as a popular alternative to the conventional MLIs that do provide inherent charge balancing, reduced device stress, output voltage\u2013boosting capability, and highly compact converters. This work proposes such a current\u2010fed DC\u2013AC switched capacitor converter (SCC). This converter offers advantages such as reduced count of switched capacitors and power devices, elimination of load\u2010side filtering elements, reduced switching ripple in output voltage due to inherent interleaving, reduced voltage and current total harmonic distortion (THD), and lower ratings of the switched capacitors. An adaptive hysteresis control scheme is used to track the voltage across the switched capacitors to a desired sinusoidal reference. The overall control architecture is straightforward to implement, and the switching architecture uses overlapping logic to prevent interrupting the input current. The work includes a complete analysis and design procedure. A 500\u2010W laboratory prototype of the proposed converter is built, with the control architecture implemented using the TMS320F28379D microcontroller. Simulation results are verified with experimental outcomes.<\/jats:p>","DOI":"10.1002\/cta.4386","type":"journal-article","created":{"date-parts":[[2024,12,16]],"date-time":"2024-12-16T01:29:32Z","timestamp":1734312572000},"page":"5007-5026","update-policy":"https:\/\/doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["A Current\u2010Fed Switched Capacitor Inverter With Voltage Boosting, Reduced Harmonic Distortion, and Minimal Device Count"],"prefix":"10.1002","volume":"53","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-1425-2781","authenticated-orcid":false,"given":"K.","family":"Ashwin","sequence":"first","affiliation":[{"name":"Interdisciplinary Centre for Energy Research (ICER) Indian Institute of Science (IISc)  Bengaluru Karnataka India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"K.","family":"Nakul\u00a0Narayanan","sequence":"additional","affiliation":[{"name":"Department of Electronics System Engineering (DESE) Indian Institute of Science (IISc)  Bengaluru Karnataka India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"L.","family":"Umanand","sequence":"additional","affiliation":[{"name":"Department of Electronics System Engineering (DESE) Indian Institute of Science (IISc)  Bengaluru Karnataka India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"B.","family":"Subba\u00a0Reddy","sequence":"additional","affiliation":[{"name":"High Voltage Engineering Indian Institute of Science (IISc)  Bengaluru Karnataka India"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"311","published-online":{"date-parts":[[2024,12,15]]},"reference":[{"key":"e_1_2_10_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIA.2005.853371"},{"key":"e_1_2_10_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2018.2890649"},{"key":"e_1_2_10_4_1","doi-asserted-by":"crossref","unstructured":"L. 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