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Existing image segmentation methods face significant challenges when applied to IC images, including high resolution, limited training data, and the need for precise segmentation. To address these issues, this study proposes a combined approach of segmentation and post\u2010processing. During the segmentation stage, we use UNet++ as the base architecture, with EfficientNet\u2010B7 as the encoder, resulting in an E\u2010UNet++ model. This model effectively combines the efficiency and pre\u2010training capabilities of EfficientNet with the ability of UNet++ to capture both global structural information and fine\u2010grained boundary details in IC images, enabling it to effectively handle challenges such as high resolution and limited training samples. In the post\u2010processing stage, to address potential noise caused by the insufficient utilization of spatial location information in network\u2010based methods, we propose the use of Hough circle detection and median filtering to eliminate noise from vias and non\u2010via regions. Compared to the suboptimal segmentation model, our proposed method achieved a 0.58% improvement in mean intersection over union (mIoU) and a 0.33% improvement in mean pixel accuracy (MPA) on the real\u2010world dataset and a 0.78% improvement in mIoU and a 0.44% improvement in MPA on the open\u2010source dataset. These experimental results demonstrate that our method effectively improves the accuracy of IC segmentation.<\/jats:p>","DOI":"10.1002\/cta.4485","type":"journal-article","created":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T23:40:56Z","timestamp":1740181256000},"page":"5913-5923","update-policy":"https:\/\/doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":6,"title":["Segmentation of IC Images in Integrated Circuit Reverse Engineering Using EfficientNet Encoder Based on U\u2010Net++ Architecture"],"prefix":"10.1002","volume":"53","author":[{"ORCID":"https:\/\/orcid.org\/0009-0002-8638-2937","authenticated-orcid":false,"given":"Hongnan","family":"Cheng","sequence":"first","affiliation":[{"name":"School of Mathematics and Statistics Hainan University  Haikou China"},{"name":"Key Laboratory of Engineering Modeling and Statistical Computation of Hainan Province Hainan University  Haikou China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0006-0087-3161","authenticated-orcid":false,"given":"Chaozhi","family":"Yu","sequence":"additional","affiliation":[{"name":"School of Mathematics and Statistics Hainan University  Haikou China"},{"name":"Key Laboratory of Engineering Modeling and Statistical Computation of Hainan Province Hainan University  Haikou China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chenguang","family":"Zhang","sequence":"additional","affiliation":[{"name":"School of Mathematics and Statistics Hainan University  Haikou China"},{"name":"Key Laboratory of Engineering Modeling and Statistical Computation of Hainan Province Hainan University  Haikou China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"311","published-online":{"date-parts":[[2025,2,21]]},"reference":[{"issue":"8","key":"e_1_2_8_2_1","first-page":"25","article-title":"Reverse Engineering of CMOS Integrated Circuits","volume":"88","author":"Masalskis G.","year":"2008","journal-title":"Elektronika ir Elektrotechnika"},{"key":"e_1_2_8_3_1","doi-asserted-by":"crossref","unstructured":"B. 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