{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,10,25]],"date-time":"2023-10-25T09:10:27Z","timestamp":1698225027580},"reference-count":11,"publisher":"Wiley","issue":"5","license":[{"start":{"date-parts":[[2006,12,13]],"date-time":"2006-12-13T00:00:00Z","timestamp":1165968000000},"content-version":"vor","delay-in-days":5216,"URL":"http:\/\/onlinelibrary.wiley.com\/termsAndConditions#vor"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Circuit Theory & Apps"],"published-print":{"date-parts":[[1992,9]]},"abstract":"Abstract<\/jats:title>Analogue realizations of neural networks are superior in speed. the hardware accelerator boards using catalogue programmable VLSI ICs represent a trade\u2010off having higher reconfigurability and lower cost. This paper presents such a solution for a cellular neural network (CNN).<\/jats:p>The architecture of the present design (CNN\u2010HAC) using four standard DSPs to calculate the transient response of a one\u2010layer CNN containing (0.25\u20130.75) \u00d7 106<\/jats:sup> analogue neural cells (depending on the type of template) is presented. the architecture and also the design principles are independent of the number of processors. the actual design was made in the form of a PC add\u2010on board.<\/jats:p>The global control unit, which connects the board to the host firmware and communicates control signals to\/from the local control units of the DSPs, was realized mainly with EPLDs.<\/jats:p>A special correspondence between the virtual processing elements\u2014calculating the time\u2010discrete models of the analogue neural cells\u2014and the physical ones is discussed in detail. It is realized in an architecture with a simple, two\u2010directional interprocessor communication. This architecture can be \u2018scaled down\u2019 using faster processors, EPLDs and memories. the present version runs with 2 \u03bcs\/cell\/iteration speed.<\/jats:p>","DOI":"10.1002\/cta.4490200512","type":"journal-article","created":{"date-parts":[[2007,7,2]],"date-time":"2007-07-02T04:04:05Z","timestamp":1183349045000},"page":"589-599","source":"Crossref","is-referenced-by-count":25,"title":["A digital multiprocessor hardware accelerator board for cellular neural networks: CNN\u2010HAC"],"prefix":"10.1002","volume":"20","author":[{"given":"T.","family":"Roska","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"G.","family":"B\u00e1rtfai","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"P.","family":"Szolgay","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"T.","family":"Szir\u00e1nyi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"A.","family":"Radv\u00e1nyi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"T.","family":"Kozek","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Z. 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Radv\u00e1nyi (eds) CNND Simulator User's Guide Version 3.01 Report No. 36\/1990 Computer and Automation Institute of the Hungarian Academy of Sciences (MTA SzTAKI) Budapest 1990."}],"container-title":["International Journal of Circuit Theory and Applications"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.wiley.com\/onlinelibrary\/tdm\/v1\/articles\/10.1002%2Fcta.4490200512","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1002\/cta.4490200512","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,10,24]],"date-time":"2023-10-24T02:40:51Z","timestamp":1698115251000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1002\/cta.4490200512"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1992,9]]},"references-count":11,"journal-issue":{"issue":"5","published-print":{"date-parts":[[1992,9]]}},"alternative-id":["10.1002\/cta.4490200512"],"URL":"https:\/\/doi.org\/10.1002\/cta.4490200512","archive":["Portico"],"relation":{},"ISSN":["0098-9886","1097-007X"],"issn-type":[{"value":"0098-9886","type":"print"},{"value":"1097-007X","type":"electronic"}],"subject":[],"published":{"date-parts":[[1992,9]]}}}