{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,8]],"date-time":"2026-03-08T23:15:32Z","timestamp":1773011732625,"version":"3.50.1"},"reference-count":34,"publisher":"Wiley","issue":"3","license":[{"start":{"date-parts":[[2025,7,28]],"date-time":"2025-07-28T00:00:00Z","timestamp":1753660800000},"content-version":"vor","delay-in-days":0,"URL":"http:\/\/onlinelibrary.wiley.com\/termsAndConditions#vor"},{"start":{"date-parts":[[2025,7,28]],"date-time":"2025-07-28T00:00:00Z","timestamp":1753660800000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/doi.wiley.com\/10.1002\/tdm_license_1.1"}],"content-domain":{"domain":["onlinelibrary.wiley.com"],"crossmark-restriction":true},"short-container-title":["Circuit Theory &amp;amp; Apps"],"published-print":{"date-parts":[[2026,3]]},"abstract":"<jats:title>ABSTRACT<\/jats:title>\n                  <jats:p>\n                    Integrated circuits operating in a radiation environment are susceptible to single\u2010event effects (SEE), which can lead to performance degradation or functional failure. To tolerate soft errors induced by single\u2010event upset (SEU), this paper proposes radiation\u2010hardened flip\u2010flops. The proposed flip\u2010flop designs can detect or correct soft errors caused by SEU in\u00a0situ, by the addition of a shadow latch for storing backup data, along with an error detector or error corrector. The inputs of the shadow latches employ the C\n                    <jats:sup>2<\/jats:sup>\n                    MOS logic to eliminate the additional clock generators. The double\u2010node upset (DNU) induced by single\u2010event charge sharing has become an emerging reliability challenge in nanoscale technology. A modified version of the SEU correction flip\u2010flop is proposed to mitigate the DNU. The proposed flip\u2010flop designs have been verified through SPICE simulations with a 65\u2010nm commercial process model and compared with some state\u2010of\u2010the\u2010art radiation\u2010hardened flip\u2010flops.\n                  <\/jats:p>","DOI":"10.1002\/cta.70014","type":"journal-article","created":{"date-parts":[[2025,7,28]],"date-time":"2025-07-28T08:00:42Z","timestamp":1753689642000},"page":"1373-1384","update-policy":"https:\/\/doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["In Situ Single\u2010Event Upset Tolerant Flip\u2010Flip Designs for Nanoscale Technology"],"prefix":"10.1002","volume":"54","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-8593-7182","authenticated-orcid":false,"given":"Hongchen","family":"Li","sequence":"first","affiliation":[{"name":"Heilongjiang Provincial Key Laboratory of Micro\u2010Nano Sensitive Devices and Systems Heilongjiang University  Harbin China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xiaofeng","family":"Zhao","sequence":"additional","affiliation":[{"name":"Heilongjiang Provincial Key Laboratory of Micro\u2010Nano Sensitive Devices and Systems Heilongjiang University  Harbin China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jie","family":"Li","sequence":"additional","affiliation":[{"name":"School of Astronautics Harbin Institute of Technology  Harbin China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mingxue","family":"Li","sequence":"additional","affiliation":[{"name":"School of Astronautics Harbin Institute of Technology  Harbin China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"311","published-online":{"date-parts":[[2025,7,28]]},"reference":[{"key":"e_1_2_8_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2005.853449"},{"key":"e_1_2_8_3_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2021.105340"},{"key":"e_1_2_8_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2022.3178058"},{"key":"e_1_2_8_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2013.2255624"},{"key":"e_1_2_8_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2017.2787906"},{"key":"e_1_2_8_7_1","unstructured":"M. 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