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We present speed\u2010up results obtained on the Intel iPSC\/860 that compare one\u2010, two\u2010, and three\u2010dimensional decompositions of the domain for both positive definite and positive semidefinite test problems. We develop a model for the RSCG algorithm to analyze computational and communication costs. The model is validated using experimental data and then used to examine and predict behavior of the RSCG algorithm as a function of architecture parameters including communication latency and transmission times and memory access costs.<\/jats:p>","DOI":"10.1002\/nla.1680020503","type":"journal-article","created":{"date-parts":[[2005,11,1]],"date-time":"2005-11-01T19:23:36Z","timestamp":1130873016000},"page":"401-414","source":"Crossref","is-referenced-by-count":2,"title":["The RSCG algorithm on distributed memory architectures"],"prefix":"10.1002","volume":"2","author":[{"given":"Lori","family":"Freitag","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"James","family":"Ortega","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"311","published-online":{"date-parts":[[2005,7,8]]},"reference":[{"key":"e_1_2_1_2_2","unstructured":"D.Bailey E.Barszcz R.Fatoohi H.SimonandS.Weeratunga.Performance results on the Intel Touchstone Gamma prototype. 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