{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T11:43:00Z","timestamp":1725450180538},"reference-count":13,"publisher":"Wiley","issue":"5","license":[{"start":{"date-parts":[[2007,9,5]],"date-time":"2007-09-05T00:00:00Z","timestamp":1188950400000},"content-version":"vor","delay-in-days":8282,"URL":"http:\/\/onlinelibrary.wiley.com\/termsAndConditions#vor"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Systems &amp; Computers in Japan"],"published-print":{"date-parts":[[1985,1]]},"abstract":"<jats:title>Abstract<\/jats:title><jats:p>Construction methods for ternary logic circuits and ternary tri\u2010stable flip\u2010flops, using ternary basic operational circuits composed only of CMOS\u2010ICs have been reported. This paper discusses the construction methods for ternary sequential circuits, such as ternary counters, using those ternary logic circuits and ternary tri\u2010stable flip\u2010flops. Among various types of ternary tri\u2010stable flip\u2010flops, this paper uses two\u2010stage ternary up, down and up\u2010down type JK flip\u2010flops. As the logical\u2010type ternary counters, up, down and up\u2010down type divide\u2010by\u201010 counters are realized. Considering then, the constructions of divide\u2010by\u20102 to 9 counters, the input equations for the ternary up\u2010 and down\u2010type JK flip\u2010flops are determined. The feedback\u2010type ternary divide\u2010by\u20108 counter is also discussed. As the ternary shift\u2010register type counters, ternary ring counter, ternary Johnson counter, clockwise and counter\u2010clockwise cycling counters are realized.<\/jats:p>","DOI":"10.1002\/scj.4690160511","type":"journal-article","created":{"date-parts":[[2007,7,7]],"date-time":"2007-07-07T10:17:19Z","timestamp":1183803439000},"page":"97-105","source":"Crossref","is-referenced-by-count":2,"title":["Construction of up\u2010down\u2010type and shift\u2010register\u2010type counters using ternary flip\u2010flop circuits"],"prefix":"10.1002","volume":"16","author":[{"given":"Noriaki","family":"Muranaka","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shigeru","family":"Imanishi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"311","published-online":{"date-parts":[[2007,9,5]]},"reference":[{"key":"e_1_2_1_2_2","first-page":"165","volume-title":"Pulse and digital circuits","author":"Koshiba N.","year":"1954"},{"key":"e_1_2_1_3_2","first-page":"245","article-title":"Proposal of symmetric ternary logic system","volume":"59","author":"Tayama N.","year":"1980","journal-title":"Trans. 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No. 445 pp.76\u201393(Mar.1982)."},{"issue":"12","key":"e_1_2_1_10_2","first-page":"1513","article-title":"Ternary logical gate circuits using CMOS\u2010ICs","volume":"65","author":"Muranaka N.","year":"1982","journal-title":"Trans. (D), I.E.C.E., Japan"},{"key":"e_1_2_1_11_2","first-page":"1588","volume-title":"Constructions of ternary up\u2010down type circuits by absolute value notation","author":"Asada K.","year":"1983"},{"key":"e_1_2_1_12_2","unstructured":"N.Muranaka N.SueokaandS.Imanishi.Constructions of ternary multiplication circuit by complementary notation Joint Conv. Kansai Chap. G6\u20102 (1983)."},{"issue":"3","key":"e_1_2_1_13_2","first-page":"241","article-title":"Constructions of ternary tri\u2010stable flip\u2010flop circuits","volume":"67","author":"Muranaka N.","year":"1984","journal-title":"Trans. (D), I.E.C.E., Japan"},{"key":"e_1_2_1_14_2","first-page":"1743","volume-title":"A construction of ternary multiplication circuit by absolute value notation","author":"Muranaka N.","year":"1984"}],"container-title":["Systems and Computers in Japan"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.wiley.com\/onlinelibrary\/tdm\/v1\/articles\/10.1002%2Fscj.4690160511","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1002\/scj.4690160511","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,10,21]],"date-time":"2023-10-21T12:53:25Z","timestamp":1697892805000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1002\/scj.4690160511"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1985,1]]},"references-count":13,"journal-issue":{"issue":"5","published-print":{"date-parts":[[1985,1]]}},"alternative-id":["10.1002\/scj.4690160511"],"URL":"https:\/\/doi.org\/10.1002\/scj.4690160511","archive":["Portico"],"relation":{},"ISSN":["0882-1666","1520-684X"],"issn-type":[{"value":"0882-1666","type":"print"},{"value":"1520-684X","type":"electronic"}],"subject":[],"published":{"date-parts":[[1985,1]]}}}