{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,10,22]],"date-time":"2023-10-22T06:40:53Z","timestamp":1697956853516},"reference-count":12,"publisher":"Wiley","issue":"7","license":[{"start":{"date-parts":[[2007,3,21]],"date-time":"2007-03-21T00:00:00Z","timestamp":1174435200000},"content-version":"vor","delay-in-days":7749,"URL":"http:\/\/onlinelibrary.wiley.com\/termsAndConditions#vor"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Systems &amp;amp; Computers in Japan"],"published-print":{"date-parts":[[1986,1]]},"abstract":"<jats:title>Abstract<\/jats:title><jats:p>A trend in computer development aiming at high\u2010speed processing is high\u2010level parallel processing using a large number of processing elements. This scheme is becoming more realistic with the recent progress of VLSI technology. On the other hand, there arises a problem of how to cope with the generation of faults with the increased number of processing elements. A faulttolerant computer with multiple redundancy has been developed, but no method has been presented in the parallel computer environment whereby sufficient redundancy against fault can be provided, to recover from fault and to continue the computation without a system down. In general, completeness of data is lost by a fault. In the field of numerical computation, however, there are problems with less stringent requirement for completeness of data (e.g., in iterative solution of a system of equations). This paper discusses the case where such a problem is solved by a parallel computer with lattice topology. Three structural types are proposed for dynamic fault recovery during execution, mutual connection and the method of recovery. The result of evaluation by simulation is shown.<\/jats:p>","DOI":"10.1002\/scj.4690170702","type":"journal-article","created":{"date-parts":[[2007,7,7]],"date-time":"2007-07-07T12:28:28Z","timestamp":1183811308000},"page":"10-18","source":"Crossref","is-referenced-by-count":0,"title":["Dynamic fault recovery in mesh\u2010connected parallel computers"],"prefix":"10.1002","volume":"17","author":[{"given":"Takashi","family":"Yokota","sequence":"first","affiliation":[]},{"given":"Hideharu","family":"Amano","sequence":"additional","affiliation":[]},{"given":"Hideo","family":"Aiso","sequence":"additional","affiliation":[]}],"member":"311","published-online":{"date-parts":[[2007,3,21]]},"reference":[{"key":"e_1_2_1_2_2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1984.1676421"},{"key":"e_1_2_1_3_2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1982.1676021"},{"key":"e_1_2_1_4_2","unstructured":"L.CimminieraandA.Serra. A faulttolerant connecting network for multiprocessor systems Proc. of 1982 Intl. Conf. on Parallel Processing pp.113\u2013122."},{"key":"e_1_2_1_5_2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1983.1676170"},{"key":"e_1_2_1_6_2","unstructured":"J. E.Lillienkamp D. H.LawrieandP\u2010C.Yew. A fault\u2010tolerant interconnection network using error correcting codes Proc. of 1982 Intl. Conf. on Parallel Processing pp.123\u2013125."},{"key":"e_1_2_1_7_2","first-page":"4","article-title":"Analysis of chordal ring network","volume":"30","author":"Arden B. W.","year":"1981","journal-title":"I.E.E.E. Trans. Comput."},{"key":"e_1_2_1_8_2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1981.1675735"},{"key":"e_1_2_1_9_2","unstructured":"D. K.Pradhan. Fault\u2010tolerant architectures for multiprocessors and VLSI systems Proc. of 13th Ann. Symp. on Fault\u2010Tolerant Computing pp.436\u2013441(1983)."},{"key":"e_1_2_1_10_2","unstructured":"Yokota Osawa AmanoandAiso. Square lattice connection network with faulttolerant property HOBONET Papers of Technical Group on Architecture Inf. Proc. Soc. Japan 50\u20132."},{"key":"e_1_2_1_11_2","unstructured":"G.Osawa H.AmanoandH.Aiso. HOBONET An inter\u2010PU connection network with fault\u2010tolerance Proc. of the 1984 Intl. Conf. on Parallel Processing pp.165\u2013168."},{"key":"e_1_2_1_12_2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1980.1675684"},{"key":"e_1_2_1_13_2","doi-asserted-by":"publisher","DOI":"10.1145\/356725.356729"}],"container-title":["Systems and Computers in Japan"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.wiley.com\/onlinelibrary\/tdm\/v1\/articles\/10.1002%2Fscj.4690170702","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1002\/scj.4690170702","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,10,22]],"date-time":"2023-10-22T00:30:17Z","timestamp":1697934617000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1002\/scj.4690170702"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1986,1]]},"references-count":12,"journal-issue":{"issue":"7","published-print":{"date-parts":[[1986,1]]}},"alternative-id":["10.1002\/scj.4690170702"],"URL":"https:\/\/doi.org\/10.1002\/scj.4690170702","archive":["Portico"],"relation":{},"ISSN":["0882-1666","1520-684X"],"issn-type":[{"value":"0882-1666","type":"print"},{"value":"1520-684X","type":"electronic"}],"subject":[],"published":{"date-parts":[[1986,1]]}}}