{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,10,22]],"date-time":"2023-10-22T11:41:08Z","timestamp":1697974868000},"reference-count":8,"publisher":"Wiley","issue":"8","license":[{"start":{"date-parts":[[2007,3,21]],"date-time":"2007-03-21T00:00:00Z","timestamp":1174435200000},"content-version":"vor","delay-in-days":7384,"URL":"http:\/\/onlinelibrary.wiley.com\/termsAndConditions#vor"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Systems &amp; Computers in Japan"],"published-print":{"date-parts":[[1987,1]]},"abstract":"<jats:title>Abstract<\/jats:title><jats:p>The programmable logic unit (PLU) has been proposed to realize a high\u2010speed operation. The idea is to perform computation obtained by a static data flow scheme using the stepwise arithmetic logics distributed in the memory. This paper describes the configuration of the prototype PLU, the basic concepts of the computation and the synchronization between the PLU and the main control unit (CU). Then theoretical discussions are made on the computation time for the arithmetic and the iterative programs. It is shown that the high\u2010speed processing is realized by the effects of the parallel computation and of the pipelined computation, mapping many templates of a loop program on the PLU. Furthermore, the multiprogramming for the computer with PLU is proposed to utilize effectively the waiting time for the computation in the PLU. The throughput improvement is indicated by theoertical analysis, comparing the computer using PLU with the traditional sequential computer. Finally, the usefulness of the PLU is demonstrated.<\/jats:p>","DOI":"10.1002\/scj.4690180806","type":"journal-article","created":{"date-parts":[[2007,7,7]],"date-time":"2007-07-07T14:18:17Z","timestamp":1183817897000},"page":"57-66","source":"Crossref","is-referenced-by-count":0,"title":["Performance evaluation of a computer using programmable logic units"],"prefix":"10.1002","volume":"18","author":[{"given":"Takahiko","family":"Murayama","sequence":"first","affiliation":[]},{"given":"Hidekazu","family":"Yamada","sequence":"additional","affiliation":[]},{"given":"Tadao","family":"Nakamura","sequence":"additional","affiliation":[]},{"given":"Yoshiharu","family":"Shigei","sequence":"additional","affiliation":[]},{"given":"Yoshio","family":"Yoshioka","sequence":"additional","affiliation":[]}],"member":"311","published-online":{"date-parts":[[2007,3,21]]},"reference":[{"key":"e_1_2_1_2_2","doi-asserted-by":"publisher","DOI":"10.1145\/359576.359579"},{"key":"e_1_2_1_3_2","volume-title":"Parallel computers","author":"Hockney R. W.","year":"1981"},{"key":"e_1_2_1_4_2","first-page":"3","volume":"12","author":"Utsunomiya K.","year":"1983","journal-title":"Data\u2010flow computer, bit"},{"issue":"10","key":"e_1_2_1_5_2","first-page":"1153","article-title":"Suggestions of memory units with programmable arithmetic logic on each memory step","volume":"66","author":"Yoshioka Y.","year":"1983","journal-title":"Trans. (D), I.E.C.E., Japan"},{"key":"e_1_2_1_6_2","article-title":"Architecture and performance of programmable logic unit","volume":"83","author":"Yamada H.","year":"1983","journal-title":"Tech. Rep. I.E.C.E., Japan"},{"key":"e_1_2_1_7_2","unstructured":"H.Yamadaet al.Programmable logic unit 7th Symp. Inf. Theory and Appl. (Nov.1984)."},{"key":"e_1_2_1_8_2","article-title":"Control scheme for programmable logic unit","volume":"84","author":"Aoki K.","year":"1984","journal-title":"Tech. Rep. I.E.C.E., Japan"},{"key":"e_1_2_1_9_2","volume-title":"The Logic Design of Transistor Digital Computer","author":"Maley G. A.","year":"1963"}],"container-title":["Systems and Computers in Japan"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.wiley.com\/onlinelibrary\/tdm\/v1\/articles\/10.1002%2Fscj.4690180806","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1002\/scj.4690180806","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,10,21]],"date-time":"2023-10-21T06:37:14Z","timestamp":1697870234000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1002\/scj.4690180806"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1987,1]]},"references-count":8,"journal-issue":{"issue":"8","published-print":{"date-parts":[[1987,1]]}},"alternative-id":["10.1002\/scj.4690180806"],"URL":"https:\/\/doi.org\/10.1002\/scj.4690180806","archive":["Portico"],"relation":{},"ISSN":["0882-1666","1520-684X"],"issn-type":[{"value":"0882-1666","type":"print"},{"value":"1520-684X","type":"electronic"}],"subject":[],"published":{"date-parts":[[1987,1]]}}}