{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,10,23]],"date-time":"2023-10-23T06:41:06Z","timestamp":1698043266833},"reference-count":10,"publisher":"Wiley","issue":"1","license":[{"start":{"date-parts":[[2007,3,21]],"date-time":"2007-03-21T00:00:00Z","timestamp":1174435200000},"content-version":"vor","delay-in-days":5923,"URL":"http:\/\/onlinelibrary.wiley.com\/termsAndConditions#vor"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Systems &amp; Computers in Japan"],"published-print":{"date-parts":[[1991,1]]},"abstract":"<jats:title>Abstract<\/jats:title><jats:p>To analyze the behavior of semiconductor devices numerically, we need to solve extremely large and sparse linear systems of equations as fast as possible. In this paper, parallel processing architectures using systolic arrays are proposed as a rapid solver of linear equations. The architectures are designed to reduce the number of processing elements, utilizing the regularity and the sparseness of coefficient matrices.<\/jats:p><jats:p>The proposed systolic arrays consist of sixty\u2010four cells for incomplete matrix decomposition and of seven cells for matrix\u2010vector multiplication. This number is independent from the number <jats:italic>N<\/jats:italic> of grid points discretized for a three\u2010dimensional device. The processing time of the array to solve a system of equations is proportional to <jats:italic>N.<\/jats:italic> Furthermore, the architectures are revised for faster parallel computation. The acceleration is based on the fact that a coefficient matrix is decomposed of smaller matrices. By the acceleration for matrix\u2010vector multiplication, required cells are 8 \u00d7 <jats:italic>N<\/jats:italic><jats:sup>1\/3<\/jats:sup>, but the processing time is proportional to <jats:italic>N<\/jats:italic><jats:sup>2\/3<\/jats:sup>.<\/jats:p>","DOI":"10.1002\/scj.4690220105","type":"journal-article","created":{"date-parts":[[2007,7,7]],"date-time":"2007-07-07T19:35:04Z","timestamp":1183836904000},"page":"39-48","source":"Crossref","is-referenced-by-count":0,"title":["A fast processor for 3\u2010d device simulation using systolic arrays"],"prefix":"10.1002","volume":"22","author":[{"given":"Takashi","family":"Naritomi","sequence":"first","affiliation":[]},{"given":"Hirotomo","family":"Aso","sequence":"additional","affiliation":[]},{"given":"Masayuki","family":"Kimura","sequence":"additional","affiliation":[]}],"member":"311","published-online":{"date-parts":[[2007,3,21]]},"reference":[{"key":"e_1_2_1_2_2","unstructured":"R. Dang (Editor).Process\/Device Simulation Technology. Japanese Sangyo\u2010Tosho (1988)."},{"key":"e_1_2_1_3_2","first-page":"301","volume-title":"Process and Device Modeling","author":"Shigyo N.","year":"1986"},{"key":"e_1_2_1_4_2","first-page":"1939","article-title":"Parallel pipelined processor \u201cRAMP\u201d for LU decomposition of sparse matrix","volume":"71","author":"Tanabe N.","year":"1988","journal-title":"Trans. I.E.I.C.E."},{"key":"e_1_2_1_5_2","volume-title":"Introduction to VLSI Systems","author":"Mead C.","year":"1980"},{"key":"e_1_2_1_6_2","doi-asserted-by":"publisher","DOI":"10.1109\/MC.1982.1653825"},{"key":"e_1_2_1_7_2","first-page":"515","article-title":"A synthesis method of systolic algorithms for nested loop programs","volume":"70","author":"Miura D.","year":"1987","journal-title":"Trans. I.E.I.C.E."},{"key":"e_1_2_1_7_3","doi-asserted-by":"publisher","DOI":"10.1002\/scj.4690190107"},{"key":"e_1_2_1_8_2","first-page":"1281","article-title":"A systematic method of synthesizing systolic arrays using a data dependence graph","volume":"71","author":"Iiguni Y.","year":"1988","journal-title":"Trans. I.E.I.C.E."},{"key":"e_1_2_1_9_2","first-page":"1487","article-title":"Automatic design of systolic arrays","volume":"71","author":"Aso H.","year":"1988","journal-title":"Trans. I.E.I.C.E."},{"key":"e_1_2_1_10_2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1987.5009502"}],"container-title":["Systems and Computers in Japan"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.wiley.com\/onlinelibrary\/tdm\/v1\/articles\/10.1002%2Fscj.4690220105","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1002\/scj.4690220105","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,10,23]],"date-time":"2023-10-23T00:05:38Z","timestamp":1698019538000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1002\/scj.4690220105"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1991,1]]},"references-count":10,"journal-issue":{"issue":"1","published-print":{"date-parts":[[1991,1]]}},"alternative-id":["10.1002\/scj.4690220105"],"URL":"https:\/\/doi.org\/10.1002\/scj.4690220105","archive":["Portico"],"relation":{},"ISSN":["0882-1666","1520-684X"],"issn-type":[{"value":"0882-1666","type":"print"},{"value":"1520-684X","type":"electronic"}],"subject":[],"published":{"date-parts":[[1991,1]]}}}