{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,10,26]],"date-time":"2023-10-26T05:40:55Z","timestamp":1698298855920},"reference-count":12,"publisher":"Wiley","issue":"8","license":[{"start":{"date-parts":[[2007,3,21]],"date-time":"2007-03-21T00:00:00Z","timestamp":1174435200000},"content-version":"vor","delay-in-days":5192,"URL":"http:\/\/onlinelibrary.wiley.com\/termsAndConditions#vor"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Systems &amp;amp; Computers in Japan"],"published-print":{"date-parts":[[1993,1]]},"abstract":"<jats:title>Abstract<\/jats:title><jats:p>A reconfiguration scheme is proposed in which a mesh\u2010connected highly parallel computer is divided into groups of PEs with small mesh\u2010structures, a spare row is added to each group (in what follows, such a group with a spare row is called a plane), these planes are successively connected upward and downward, and finally the top and bottom groups are connected. The scheme has such features that: (1) although switchings for reconfiguration are done locally, compensations are done globally, considering the distribution of faults over the whole planes; and (2) switching algorithm and circuits are simple and hence our scheme is suitable for dynamic reconfiguration.<\/jats:p><jats:p>First, a method for repairing faults is described, and the necessary and sufficient condition for repairability is given. Next, formulas for the reliabilities of systems are given. Using these formulas, an example of computing the improvement degree of MTTF is illustrated and the result is compared with those in the literature. The probabilities of system survivals against the number of faulty PE's also are analyzed and the results are compared with those in the literature. Finally, logic circuits for the reconfiguration are shown and the correctness of their behavior is proved.<\/jats:p>","DOI":"10.1002\/scj.4690240802","type":"journal-article","created":{"date-parts":[[2007,7,8]],"date-time":"2007-07-08T01:33:34Z","timestamp":1183858414000},"page":"11-24","source":"Crossref","is-referenced-by-count":1,"title":["Construction of fault\u2010tolerant mesh\u2010connected highly parallel computer and its performance analysis"],"prefix":"10.1002","volume":"24","author":[{"given":"Itsuo","family":"Takanami","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Katsushi","family":"Inoue","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Takahiro","family":"Watanabe","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Minoru","family":"Oka","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"311","published-online":{"date-parts":[[2007,3,21]]},"reference":[{"issue":"1","key":"e_1_2_1_2_2","first-page":"91","article-title":"A note on reliability improvement of a highly parallel computer","volume":"70","author":"Shimada S.","year":"1987","journal-title":"Trans. I.E.I.C.E., Japan (D)"},{"key":"e_1_2_1_3_2","first-page":"565","volume-title":"Reconfigurable architectures for VLSI processing arrays","author":"Sami M.","year":"1983"},{"issue":"8","key":"e_1_2_1_4_2","first-page":"565","article-title":"Processor PAX\u2010128","volume":"67","author":"Shirakawa T.","year":"1984","journal-title":"Trans. I.E.I.C.E., Japan, (D)"},{"issue":"6","key":"e_1_2_1_5_2","first-page":"1195","article-title":"Dynamic fault\u2010recovery on mesh\u2010connected parallel computers","volume":"68","author":"Yokota T.","year":"1985","journal-title":"Trans. I.E.I.C.E., Japan (D)"},{"issue":"9","key":"e_1_2_1_6_2","first-page":"1039","article-title":"Fault\u2010tolerance techniques in parallel processing","volume":"27","author":"Nanya T.","year":"1986","journal-title":"IPSJ"},{"issue":"1","key":"e_1_2_1_7_2","first-page":"94","article-title":"Massively parallel machines","volume":"28","author":"Koike M.","year":"1987","journal-title":"IPSJ"},{"issue":"2","key":"e_1_2_1_8_2","first-page":"117","article-title":"Fault\u2010tolerant hypercube architecture without a switching mechanism","volume":"72","author":"Ishikawa T.","year":"1989","journal-title":"Trans. I.E.I.C.E., Japan, (D\u2010I)"},{"key":"e_1_2_1_9_2","unstructured":"I.Takanami M.OkaandK.InoueA Construction of Fault\u2010Tolerant Mesh\u2010Connected Highly Parallel Computers and Analysis of Its Performance Report on Synthetical Study on Highly Parallel Information Processing Based on Cellular Structures pp.239\u2013247(Oct.1989)."},{"issue":"3","key":"e_1_2_1_10_2","first-page":"286","article-title":"An efficient compensation\u2010path finding algorithm for a large\u2010scale processor array","volume":"73","author":"Ozawa T.","year":"1990","journal-title":"Trans. I.E.I.C.E., Japan (D\u2010I)"},{"issue":"3","key":"e_1_2_1_11_2","first-page":"314","article-title":"A hypercube design on wafer scale integration","volume":"73","author":"Ito H.","year":"1990","journal-title":"Trans. I.E.I.C.E., Japan (D\u2010I)"},{"issue":"11","key":"e_1_2_1_12_2","first-page":"1242","article-title":"Defect tolerance and fault tolerance in VLSIs, Jour","volume":"73","author":"Tsuda N.","year":"1990","journal-title":"I.E.I.C.E., Japan"},{"key":"e_1_2_1_13_2","volume-title":"A construction of fault\u2010tolerent mesh\u2010connected highly parallel computers and its performance analysis, Technical Report FTS91\u201020","author":"Takanami I.","year":"1991"}],"container-title":["Systems and Computers in Japan"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.wiley.com\/onlinelibrary\/tdm\/v1\/articles\/10.1002%2Fscj.4690240802","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1002\/scj.4690240802","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,10,25]],"date-time":"2023-10-25T04:55:59Z","timestamp":1698209759000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1002\/scj.4690240802"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1993,1]]},"references-count":12,"journal-issue":{"issue":"8","published-print":{"date-parts":[[1993,1]]}},"alternative-id":["10.1002\/scj.4690240802"],"URL":"https:\/\/doi.org\/10.1002\/scj.4690240802","archive":["Portico"],"relation":{},"ISSN":["0882-1666","1520-684X"],"issn-type":[{"value":"0882-1666","type":"print"},{"value":"1520-684X","type":"electronic"}],"subject":[],"published":{"date-parts":[[1993,1]]}}}