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This work presents the first experimental realization of a multi\u2010channel timing\u2010dependent spiking neural network (TD\u2010SNN) at the board\u2010level by integrating photoelectroactive synaptic devices with an analog leaky integrate\u2010and\u2010fire (LIF) neuron circuit. The synaptic devices exploit the precise timing dependency between electrical presynaptic and optical postsynaptic spikes to emulate STDP, enabling reversible and bidirectional modulation of synaptic weights through photoelectroactive doping. By engineering the shape of presynaptic pulses, the devices demonstrate diverse biological STDP learning rules, including Hebbian, anti\u2010Hebbian, all\u2010LTP, and all\u2010LTD. Integrated single\u2010 and multi\u2010channel networks exhibit self\u2010learning, system\u2010level adaptive, and competitive behaviors. Experimentally extracted STDP parameters are implemented in SNN simulations, where network performance is determined by the long\u2010term potentiation\/depression area ratio (LTP\/D area ratio,\n                    <jats:italic>PDR<\/jats:italic>\n                    ) of the STDP curve. When\n                    <jats:italic>PDR<\/jats:italic>\n                    \u2265 1.25, robust pattern classification is achieved, reaching up to 90.9% accuracy on MNIST tasks. These results mark a milestone in timing\u2010dependent neuromorphic hardware, demonstrating device\u2010level feasibility toward adaptive and real\u2010time learning hardware.\n                  <\/jats:p>","DOI":"10.1002\/adma.202517613","type":"journal-article","created":{"date-parts":[[2025,12,8]],"date-time":"2025-12-08T10:53:08Z","timestamp":1765191188000},"update-policy":"https:\/\/doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Timing\u2010Dependent Spiking Neural Network: Board\u2010Level Hardware Implementation with Photoelectroactive Van der Waals Synapses"],"prefix":"10.1002","volume":"38","author":[{"ORCID":"https:\/\/orcid.org\/0009-0003-1464-5985","authenticated-orcid":false,"given":"Seongjun","family":"Kim","sequence":"first","affiliation":[{"name":"Division of Electrical Engineering Hanyang University ERICA  Ansan 15588 Republic of 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Electrical and Computer Engineering Sungkyunkwan University  Suwon 16419 Republic of Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Junseo","family":"Lee","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering Sungkyunkwan University  Suwon 16419 Republic of Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Matthew T.","family":"Flavin","sequence":"additional","affiliation":[{"name":"School of Electrical and Computer Engineering Georgia Institute of Technology Atlanta GA 30332 USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dong\u2010Ho","family":"Kang","sequence":"additional","affiliation":[{"name":"School of Electrical Engineering and Computer Science Gwangju Institute of Science and Technology  Gwangju 61005 Republic of Korea"},{"name":"Department of Semiconductor Engineering Gwangju Institute of Science and Technology  Gwangju 61005 Republic of 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