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However, integrating high\u2010\n                    <jats:italic>k<\/jats:italic>\n                    ferroelectrics like BaTiO\n                    <jats:sub>3<\/jats:sub>\n                    (BTO) with semiconductor channels remains challenging due to epitaxial growth constraints and poor complementary metal\u2010oxide\u2010semiconductor (CMOS) compatibility. Freestanding ferroelectric membranes offer a promising route for van der Waals (vdW) integration, yet practical implementation is impeded by issues such as mechanical deformation during transfer and defect\u2010induced leakage. Here, a defect\u2010tolerant strategy for top\u2010gate integration of freestanding BTO membranes with MoS\n                    <jats:sub>2<\/jats:sub>\n                    channels is presented. A water\u2010mediated release combined with polymethyl methacrylate (PMMA)\u2010assisted transfer process is developed to preserve membrane and interface integrity, while a nanoscale dielectric\u2010channel junction design effectively suppresses leakage current well below the low\u2010power limit. The resulting FeFETs exhibit a record\u2010high memory window of 0.22\u00a0V nm\n                    <jats:sup>\u22121<\/jats:sup>\n                    , an ultrahigh dielectric constant of 52, and a near\u2010ideal subthreshold swing of 60\u00a0mV dec\n                    <jats:sup>\u22121<\/jats:sup>\n                    . Furthermore, a fully functional 3\u00a0\u00d7\u00a04 top\u2010gate FeFET array enabling in\u2010memory logic and synaptic functionalities is demonstrated. This work establishes a scalable and transferable platform for incorporating high\u2011\n                    <jats:italic>k<\/jats:italic>\n                    ferroelectric oxides into high\u2010performance reconfigurable 2D nanoelectronics.\n                  <\/jats:p>","DOI":"10.1002\/advs.202520610","type":"journal-article","created":{"date-parts":[[2025,12,14]],"date-time":"2025-12-14T15:45:28Z","timestamp":1765727128000},"update-policy":"https:\/\/doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":4,"title":["Integration of Freestanding High\u2010\n                    <i>k<\/i>\n                    Oxide Membranes for 2D Ferroelectric Field\u2010Effect Transistors"],"prefix":"10.1002","volume":"13","author":[{"given":"Zejing","family":"Guo","sequence":"first","affiliation":[{"name":"State Key Laboratory of Surface Physics and Institute for Nanoelectronic Devices and Quantum Computing Fudan University  Shanghai 200433 China"},{"name":"Zhangjiang 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Devices and Quantum Computing Fudan University  Shanghai 200433 China"},{"name":"Zhangjiang Fudan International Innovation Center Fudan University  Shanghai 201210 China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Cheng","family":"Zhang","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Surface Physics and Institute for Nanoelectronic Devices and Quantum Computing Fudan University  Shanghai 200433 China"},{"name":"Zhangjiang Fudan International Innovation Center Fudan University  Shanghai 201210 China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Hai","family":"Huang","sequence":"additional","affiliation":[{"name":"Shanghai Frontiers Science Research Base of Intelligent Optoelectronic and Perception, Institute of Optoelectronic and College of Future Information Fudan University Shanghai 200433 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