{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T14:03:57Z","timestamp":1725458637502},"publisher-location":"Boston","reference-count":15,"publisher":"Kluwer Academic Publishers","isbn-type":[{"type":"print","value":"1402075286"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1007\/0-306-48709-8_10","type":"book-chapter","created":{"date-parts":[[2005,12,30]],"date-time":"2005-12-30T11:21:38Z","timestamp":1135941698000},"page":"125-136","source":"Crossref","is-referenced-by-count":2,"title":["Scheduling and Timing Analysis of HW\/SW On-Chip Communication in MP SoC Design"],"prefix":"10.1007","author":[{"given":"Youngchul","family":"Cho","sequence":"first","affiliation":[]},{"given":"Ganghee","family":"Lee","sequence":"additional","affiliation":[]},{"given":"Kiyoung","family":"Choi","sequence":"additional","affiliation":[]},{"given":"Sungjoo","family":"Yoo","sequence":"additional","affiliation":[]},{"given":"Nacer-Eddine","family":"Zergainoh","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"10_CR1","doi-asserted-by":"crossref","unstructured":"J Brunel, W. Kruijtzer, H. Kenter, F. Petrot, L. Pasquier, and E. Kock. \u201cCOSY Communication IP\u2019s.\u201d In Proceedings of Design Automation Conference, pp. 406\u2013409, 2000.","DOI":"10.1145\/337292.337515"},{"key":"10_CR2","doi-asserted-by":"crossref","unstructured":"W. Cesario, A. Baghdadi, L. Gauthier, D. Lyonnard, G. Nicolescu, Y. Paviot, S. Yoo, A. Jerayya, and M. Diaz-Nava. \u201cComponent-based Design Approach for Multicore SoCs.\u201d In Proceedings of Design Automation Conference, June 2002.","DOI":"10.1145\/513918.514115"},{"key":"10_CR3","unstructured":"Jon Kleinsmith and Daniel D. Gajski. \u201cCommunication Synthesis for Reuse.\u201d UC Irvine, Technical Report ICS-TR-98-06, February 1998."},{"key":"10_CR4","doi-asserted-by":"crossref","unstructured":"T. Yen and W. Wolf. \u201cCommunication Synthesis for Distributed Embedded Systems.\u201d In Proceedings of ICCAD, 1995.","DOI":"10.1145\/224486.224488"},{"key":"10_CR5","doi-asserted-by":"crossref","unstructured":"R. B. Ortega and G. Borriello. \u201cCommunication Synthesis for Distributed Embedded Systems.\u201d In Proceedings of ICCAD, 1998.","DOI":"10.21236\/ADA416530"},{"issue":"1","key":"10_CR6","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/298865.298866","volume":"4","author":"Michael Gasteier","year":"1999","unstructured":"M. Gasteier and M. Glesner. \u201cBus-Based Communication Synthesis on System-Level.\u201d ACM Transactions on Design Automation of Electronic Systems, Vol. 4, No. 1, 1999.","journal-title":"ACM Transactions on Design Automation of Electronic Systems"},{"issue":"6","key":"10_CR7","doi-asserted-by":"crossref","first-page":"768","DOI":"10.1109\/43.924830","volume":"20","author":"K. Lahiri","year":"2001","unstructured":"K. Lahiri, A. Raghunathan, and S. Dey. \u201cSystem-Level Performance Analysis for Designing On-Chip Communication Architecture.\u201d In IEEE Transaction on Computer-Aided Design of Integrated Circuits and Systems, June 2001.","journal-title":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"},{"issue":"8","key":"10_CR8","doi-asserted-by":"crossref","first-page":"1077","DOI":"10.1109\/43.775629","volume":"18","author":"P.V. Knudsen","year":"1999","unstructured":"P. Knudsen and J. Madsen. \u201cIntegrating Communication Protocol Selection with Hardware\/Software Codesign.\u201d In IEEE Transaction on Computer-Aided Design of Integrated Circuits and Systems, August 1999.","journal-title":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"},{"key":"10_CR9","unstructured":"ARM, Inc. AMBA\u2122 Specification (Rev 2.0), available in http:\/\/www.arm.com\/ ."},{"key":"10_CR10","unstructured":"Sonics Inc., \u201cSonics Integration Architecture,\u201d available in http:\/\/www.sonicsinc.com\/ ."},{"key":"10_CR11","doi-asserted-by":"crossref","unstructured":"W. J. Dally and B. Towles. \u201cRoute Packet, Not Wires: On-Chip Interconnection Networks.\u201d In Proceedings of Design Automation Conference, June 2001.","DOI":"10.1109\/DAC.2001.935594"},{"key":"10_CR12","doi-asserted-by":"crossref","unstructured":"A. Siebenborn, O. Bringmann, and W. Rosenstiel. \u201cWorst-Case Performance of Parallel, Communicating Software Processes.\u201d In Proceedings of CODES 2002, 2002.","DOI":"10.1145\/774789.774798"},{"key":"10_CR13","unstructured":"Cadence Inc., VCC available at http:\/\/www.cadence.com ."},{"issue":"9","key":"10_CR14","doi-asserted-by":"publisher","first-page":"822","DOI":"10.1109\/TSE.2002.1033223","volume":"28","author":"A. Baghdadi","year":"2002","unstructured":"Amer Baghdadi, Nacer-Eddine Zergainoh, Wander O. Ces\u00e1rio, and Ahmed Amine Jerraya, \u201cCombining a Performance Estimation Methodology with a Hardware\/Software Codesign Flow Supporting Multiprocessor Systems.\u201d IEEE Transactions on Software Engineering, Vol. 28, No. 9, pp. 822\u2013831, September 2002.","journal-title":"IEEE Transactions on Software Engineering"},{"key":"10_CR15","unstructured":"Redhat Inc., eCos, available in http:\/\/www.redhat.com\/embedded\/technologies\/ecos\/ ."}],"container-title":["Embedded Software for SoC"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/0-306-48709-8_10.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,11,17]],"date-time":"2020-11-17T19:52:04Z","timestamp":1605642724000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/0-306-48709-8_10"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"ISBN":["1402075286"],"references-count":15,"URL":"https:\/\/doi.org\/10.1007\/0-306-48709-8_10","relation":{},"subject":[]}}