{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T16:46:31Z","timestamp":1725468391041},"publisher-location":"Boston","reference-count":27,"publisher":"Kluwer Academic Publishers","isbn-type":[{"type":"print","value":"0387334025"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1007\/0-387-33403-3_16","type":"book-chapter","created":{"date-parts":[[2006,8,15]],"date-time":"2006-08-15T14:25:16Z","timestamp":1155651916000},"page":"247-262","source":"Crossref","is-referenced-by-count":4,"title":["Evaluation Methodology for Single Electron Encoded Threshold Logic Gates"],"prefix":"10.1007","author":[{"given":"Casper","family":"Lageweg","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sorin","family":"Cotofana","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Stamatis","family":"Vassiliadis","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"issue":"19","key":"16_CR1","doi-asserted-by":"publisher","first-page":"2446","DOI":"10.1103\/PhysRevLett.65.2446","volume":"65","author":"D.V. Averin","year":"1990","unstructured":"Averin, D.V. and Nazarov, Yu.V. (1990). Virtual Electron Diffusion during Quantum Tunneling of the Electric Charge. Physical Review Letters, 65(19):2446\u20132449.","journal-title":"Physical Review Letters"},{"issue":"5","key":"16_CR2","doi-asserted-by":"publisher","first-page":"251","DOI":"10.1016\/0375-9601(89)90934-1","volume":"140","author":"D.V. Averin","year":"1989","unstructured":"Averin, D.V. and Odintsov, A.A. (1989). Macroscopic Quantum Tunneling of the Electric Charge in Small Tunnel Junctions. Physics Letters A, 140(5):251\u2013257.","journal-title":"Physics Letters A"},{"key":"16_CR3","doi-asserted-by":"crossref","unstructured":"Brennan, K.F. and Brown, A.S. (2002). Theory of Modern Electronic Semiconductor Devices. John Wiley and Sons, Inc.","DOI":"10.1002\/0471224618"},{"issue":"14","key":"16_CR4","doi-asserted-by":"publisher","first-page":"1954","DOI":"10.1063\/1.115637","volume":"68","author":"R.H. Chen","year":"1996","unstructured":"Chen, R.H., Korotkov, A.N., and Likharev, K.K. (1996). Single-electron Transistor Logic. Applied Physics Letters, 68(14): 1954\u20131956.","journal-title":"Applied Physics Letters"},{"key":"16_CR5","doi-asserted-by":"crossref","unstructured":"Cotofana, S.D., Lageweg, C.R., and Vassiliadis, S. (2003). On Computing Addition Related Arithmetic Operations via Controlled Transport of Charge. In proceedings of 16th IEEE Symposium on Computer Arithmetic, pages 245\u2013252.","DOI":"10.1109\/ARITH.2003.1207685"},{"key":"16_CR6","unstructured":"Goossens, M. (1998). Analog Neural Networks in Single-Electron Tunneling Technology. PhD thesis, Delft University of Technology."},{"issue":"8","key":"16_CR7","doi-asserted-by":"publisher","first-page":"1140","DOI":"10.1063\/1.1345822","volume":"78","author":"C.P. Heij","year":"2001","unstructured":"Heij, C.P., Hadley, P., and Mooij, J.E. (2001). A Single-Electron Inverter. Applied Physics Letters, 78(8): 1140\u20131142.","journal-title":"Applied Physics Letters"},{"key":"16_CR8","volume-title":"Computer Architecture-A Quantitative Approach","author":"J. Hennessy","year":"1996","unstructured":"Hennessy, J. and Patterson, D. (1996). Computer Architecture-A Quantitative Approach. Morgan Kaufmann Publishers, San Franscisco, California, 2nd edition.","edition":"2nd edition"},{"issue":"19","key":"16_CR9","doi-asserted-by":"publisher","first-page":"3307","DOI":"10.1063\/1.1572537","volume":"82","author":"K. Ishibashi","year":"2001","unstructured":"Ishibashi, K., Tsuya, D., Suzuki, M., and Aoyagi, Y. (2001). Fabrication of a Single-Electron Inverter in Multiwall Carbon Nanotubes. Applied Physics Letters, 82(19):3307\u20133309.","journal-title":"Applied Physics Letters"},{"key":"16_CR10","doi-asserted-by":"crossref","unstructured":"Iwai, H. and Momose, H.S. (1998). Ultra-Thin Gate Oxides-Performance and Reliability. In International Electron Devices Meeting 1998. IEEE.","DOI":"10.1109\/IEDM.1998.746307"},{"issue":"5","key":"16_CR11","doi-asserted-by":"publisher","first-page":"511","DOI":"10.1080\/002072199133256","volume":"86","author":"A.N. Korotkov","year":"1999","unstructured":"Korotkov, A.N. (1999). Single-Electron Logic and Memory Devices. International Journal of Electronics, 86(5):511\u2013547.","journal-title":"International Journal of Electronics"},{"key":"16_CR12","doi-asserted-by":"crossref","unstructured":"Lageweg, C.R., Cotofana, S.D., and Vassiliadis, S. (2001a). A Linear Threshold Gate Implementation in Single Electron Technology. In IEEE Computer Society Workshop on VLSI, pages 93\u201398.","DOI":"10.1109\/IWV.2001.923145"},{"key":"16_CR13","doi-asserted-by":"crossref","unstructured":"Lageweg, C.R., Cotofana, S.D., and Vassiliadis, S. (2001b). Achieving Fanout Capabilities in Single Electron Encoded Logic Networks. In 6th International Conference on Solid-State and IC Technology (ICSICT).","DOI":"10.1109\/ICSICT.2001.982159"},{"key":"16_CR14","doi-asserted-by":"crossref","unstructured":"Lageweg, C.R., Cotofana, S.D., and Vassiliadis, S. (2002). Static Buffered SET Based Logic Gates. In 2nd IEEE Conference on Nanotechnology (NANO), pages 491\u2013494.","DOI":"10.1109\/NANO.2002.1032295"},{"issue":"4","key":"16_CR15","doi-asserted-by":"publisher","first-page":"606","DOI":"10.1109\/5.752518","volume":"87","author":"K.K. Likharev","year":"1999","unstructured":"Likharev, K.K. (1999). Single-Electron Devices and Their Applications. Proceeding of the IEEE, 87(4):606\u2013632.","journal-title":"Proceeding of the IEEE"},{"issue":"7","key":"16_CR16","doi-asserted-by":"publisher","first-page":"946","DOI":"10.1063\/1.1347017","volume":"78","author":"S.V. Lotkhov","year":"2001","unstructured":"Lotkhov, S.V., Bogoslovsky, S.A., Zorin, A.B., and Niemeyer, J. (2001). Operation of a three-junction single-electron pump with on-chip resistors. Applied Physics Letters, 78(7):946\u2013948.","journal-title":"Applied Physics Letters"},{"issue":"17","key":"16_CR17","doi-asserted-by":"publisher","first-page":"2665","DOI":"10.1063\/1.125112","volume":"75","author":"S.V. Lotkhov","year":"1999","unstructured":"Lotkhov, S.V., Zangerle, H., Zorin, A.B., and Niemeyer, J. (1999). Storage Capabilities of a Four-Junction Single-Electron Trap with an On-Chip Resistor. Applied Physics Letters, 75(17):2665\u20132667.","journal-title":"Applied Physics Letters"},{"key":"16_CR18","doi-asserted-by":"crossref","unstructured":"Momose, H.S., Nakamura, S., Katsumata, Y., and Iwai, H. (1998). Study of Direct-Tunneling Gate Oxides for CMOS Applications. In 3rd International Symposium on Plasma Process-Induced Damage, pages 30\u201333. American Vacuum Society.","DOI":"10.1109\/PPID.1998.725567"},{"key":"16_CR19","unstructured":"Moore, G. (1965). Cramming More Components onto Integrated Circuits. Electronics, 38(8)."},{"key":"16_CR20","unstructured":"Muroga, S. (1971). Threshold Logic and its Applications. Wiley and Sons Inc."},{"issue":"3","key":"16_CR21","first-page":"193","volume":"49","author":"Y. Ono","year":"2000","unstructured":"Ono, Y., Takahashi, Y., Yamazaki, K., Nagase, M, Namatsu, H., Kurihara, K., and Murase, K. (2000). Fabrication Method for IC-Oriented Si Single-Electron Transistors. IEEE Transactions on Electron Devices, 49(3): 193\u2013207.","journal-title":"IEEE Transactions on Electron Devices"},{"issue":"4","key":"16_CR22","doi-asserted-by":"publisher","first-page":"486","DOI":"10.1109\/5.573737","volume":"85","author":"Y. Taur","year":"1997","unstructured":"Taur, Y., Buchanan, D.A., Chen, W., Frank, D., Ismail, K., Lo, S., Sai-Halasz, G., Viswanathan, R., Wann, H., Wind, S., and Wong, H. (1997). CMOS Scaling into the Nanometer Regime. Proceeding of the IEEE, 85(4):486\u2013504.","journal-title":"Proceeding of the IEEE"},{"key":"16_CR23","unstructured":"TRN99 (1999). Technology Roadmap for Nanoelectronics. Downloadable from website http:\/\/www.cordis.lu\/esprit\/src\/melna-rm.htm. Published on the internet by the Microelectronics Advanced Research Initiative (MELARI NANO), a European Commission (EC) Information Society Technologies (IST) program on Future and Emerging Technologies."},{"key":"16_CR24","unstructured":"TRS03 (2003). International Technology Roadmap for Semiconductors, 2003 Edition, Executive Summary. Downloadable from website http:\/\/public.itrs.net\/Home.htm. Available from SEMATECH, ITRS department, 2706 Montoppolis Drive, Austin TX 78741, USA."},{"issue":"9","key":"16_CR25","doi-asserted-by":"publisher","first-page":"4399","DOI":"10.1063\/1.352206","volume":"72","author":"J.R. Tucker","year":"1992","unstructured":"Tucker, J.R. (1992). Complementary Digital Logic based on the \u201cCoulomb Blockade\u201d. Journal of Applied Physics, 72(9):4399\u20134413.","journal-title":"Journal of Applied Physics"},{"key":"16_CR26","unstructured":"Wasshuber, C. (1998). About Single-Electron Devices and Circuits. PhD thesis, TU Vienna."},{"issue":"5","key":"16_CR27","doi-asserted-by":"publisher","first-page":"2665","DOI":"10.1063\/1.1286328","volume":"88","author":"A.B. Zorin","year":"2000","unstructured":"Zorin, A.B., Lotkhov, S.V., Zangerle, H., and Niemeyer, J. (2000). Coulomb Blockade and Cotunneling in Single Electron Circuits with On-Chip Resistors: Towards the Implementation of the R Pump. Journal of Applied Physics, 88(5):2665\u20132670.","journal-title":"Journal of Applied Physics"}],"container-title":["IFIP International Federation for Information Processing","VLSI-SOC: From Systems to Chips"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/0-387-33403-3_16.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,27]],"date-time":"2021-04-27T01:19:20Z","timestamp":1619486360000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/0-387-33403-3_16"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"ISBN":["0387334025"],"references-count":27,"URL":"https:\/\/doi.org\/10.1007\/0-387-33403-3_16","relation":{},"subject":[]}}