{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T14:32:00Z","timestamp":1725460320503},"publisher-location":"Boston, MA","reference-count":19,"publisher":"Springer US","isbn-type":[{"type":"print","value":"9781402081484"},{"type":"electronic","value":"9781402081491"}],"license":[{"start":{"date-parts":[[2004,1,1]],"date-time":"2004-01-01T00:00:00Z","timestamp":1072915200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2004]]},"DOI":"10.1007\/1-4020-8149-9_15","type":"book-chapter","created":{"date-parts":[[2006,2,22]],"date-time":"2006-02-22T14:53:33Z","timestamp":1140620013000},"page":"145-156","source":"Crossref","is-referenced-by-count":0,"title":["Adaptive Bus Encoding Schemes for Power-Efficient Data Transfer in DSM Environments"],"prefix":"10.1007","author":[{"given":"Claudia","family":"Kretzschmar","sequence":"first","affiliation":[]},{"given":"Markus","family":"Scheithauer","sequence":"additional","affiliation":[]},{"given":"Dietmar","family":"Mueller","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"15_CR1","doi-asserted-by":"crossref","unstructured":"Benini, L. and DeMicheli, G. (2002). Networks on chips: A new soc paradigm. IEEE Jounal on Computer, pages 70\u201378.","DOI":"10.1109\/2.976921"},{"key":"15_CR2","unstructured":"Benini, L., Macii, A., Macii, E., Poncino, M., and Scarsi, R. (1999). Synthesis of Low-Overhead Interfaces for Power-Efficient Communication over Wide Buses. In 36th DAC."},{"key":"15_CR3","doi-asserted-by":"crossref","unstructured":"Benini, L., Micheli, G. De, Macii, E., Sciuto, D., and Silvano, C. (1998). Address Bus Encoding Techniques for System-Level Power Optimization. In DATE.","DOI":"10.1109\/DATE.1998.655959"},{"key":"15_CR4","unstructured":"Haase, A., Kretzschmar, C., Siegmund, R., Mueller, D., Schneider, J., Boden, M., and Langer, M. (2002). Design of a Reed Solomon Decoder using Partial Dynamic Reconfiguration of XILINX Virtex FPGAs-A Case Study. In DATE, Paris, France."},{"key":"15_CR5","unstructured":"(2003). Embedded fpga cores. \n                    http:\/\/www-3.ibm.com\/chips\/products\/asics\/products\/cores\/efpga.html\n                    \n                  ."},{"key":"15_CR6","unstructured":"Kim, Ki-Wook, Baek, Kwang-Hyun, Shanbhag, Naresh, Liu, C.L., and Kang, Sung-Mo (2000). Coupling-driven signal encoding scheme for low-power interface design. In ICCAD."},{"key":"15_CR7","first-page":"66","volume-title":"Adaptive Bus Encoding Technique for Switching Activity Reduced Data Transfer over Wide System Buses","author":"C. Kretzschmar","year":"2000","unstructured":"Kretzschmar, C., Siegmund, R., and Mueller, D. (2000). Adaptive Bus Encoding Technique for Switching Activity Reduced Data Transfer over Wide System Buses. In PATMOS 2000, pages 66\u201375, Goettingen, Germany. Springer."},{"issue":"2","key":"15_CR8","doi-asserted-by":"crossref","first-page":"185","DOI":"10.1023\/A:1024451718410","volume":"26","author":"C. Kretzschmar","year":"2003","unstructured":"Kretzschmar, C., Siegmund, R., and Mueller, D. (2003). Low Power Encoding Techniques for Dynamically Reconfigurable Hardware. Special issue of the Kluwer Journal of Supercomputing, 26(2):185\u2013203.","journal-title":"Special issue of the Kluwer Journal of Supercomputing"},{"key":"15_CR9","doi-asserted-by":"crossref","unstructured":"Lekatsas, H. and Henkel, J. (2002). ETAM++: Extended Transition Activity Measure for Low Power Address Bus Designs. In ASP-DAC, pages 113\u2013120.","DOI":"10.1109\/ASPDAC.2002.994895"},{"key":"15_CR10","doi-asserted-by":"crossref","unstructured":"Lv, T, Wolf, W., Henkel, J., and Lekatsas, H. (2002). An adaptive dictionary encoding scheme for soc data buses. In Proceedings of DATE, page 1059. IEEE Computer Society.","DOI":"10.1109\/DATE.2002.998433"},{"key":"15_CR11","unstructured":"Mamidipaka, M., Hirschberg, D., and Dutt, N. (2001). Low power address encoding using selforganizing lists. In ISLPED, pages 188\u2013193. ACM Press."},{"key":"15_CR12","unstructured":"Satoshi Komatsu, Makoto Ikeda, and Kunihiro Asada (2000). Bus Data Encoding with Adaptive Code-book Method for Low Power IP Based Design. In International Workshop on IP based design and Synthesis, pages 77\u201381."},{"key":"15_CR13","doi-asserted-by":"crossref","unstructured":"Shin, Youngsoo, Chae, Soo-Ik, and Choi, Kiyoung (1998). Partial Bus-Invert Coding for Power Optimization of System Level Bus. In ISLPED, pages 127\u2013129.","DOI":"10.1145\/280756.280829"},{"key":"15_CR14","doi-asserted-by":"crossref","first-page":"49","DOI":"10.1109\/92.365453","volume":"3","author":"M. R. Stan","year":"1995","unstructured":"Stan, Mircea R. and Burleson, Wayne P. (1995). Bus-Invert Coding for Low-Power I\/O. In Transactions on VLSI Systems, volume 3, pages 49\u201358.","journal-title":"Transactions on VLSI Systems"},{"key":"15_CR15","doi-asserted-by":"crossref","unstructured":"Sylvester, D. and Keutzer, K. (1998). Getting to the Bottom of Deep Submicron. In ICCAD.","DOI":"10.1145\/288548.288614"},{"issue":"4","key":"15_CR16","doi-asserted-by":"publisher","first-page":"467","DOI":"10.1109\/5.920579","volume":"89","author":"D. Sylvester","year":"2001","unstructured":"Sylvester, D. and Keutzer, K. (2001). Impact of Small Process Geometries on Microarchitectures in Systems on a Chip. Proceedings of the IEEE, 89(4):467\u2013489.","journal-title":"Proceedings of the IEEE"},{"key":"15_CR17","doi-asserted-by":"crossref","first-page":"24","DOI":"10.1109\/54.329448","volume":"11","author":"X.L. Su","year":"1994","unstructured":"X.L. Su, X.Y. Tsui, and Despain, A.M. (1994). Saving Power in the Control Path of Embedded Processors. IEEE Design and Test of Computers, 11:24\u201330.","journal-title":"IEEE Design and Test of Computers"},{"key":"15_CR18","doi-asserted-by":"crossref","unstructured":"Yang, J. and Gupta, R. (2001). Fv encoding for low-power data i\/o. In International symposium on Low power electronics and designISLPED, pages 84\u201387. ACM Press.","DOI":"10.1145\/383082.383100"},{"key":"15_CR19","unstructured":"Zhang, Yan, Lach, John, Skadron, Kevin, and Stan, M. (2002). Odd\/even bus invert with twophase transfer for buses with coupling. In ISLPED, pages 80\u201383. ACM."}],"container-title":["IFIP International Federation for Information Processing","Design Methods and Applications for Distributed Embedded Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/1-4020-8149-9_15","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,20]],"date-time":"2019-05-20T17:43:09Z","timestamp":1558374189000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/1-4020-8149-9_15"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2004]]},"ISBN":["9781402081484","9781402081491"],"references-count":19,"URL":"https:\/\/doi.org\/10.1007\/1-4020-8149-9_15","relation":{},"ISSN":["1571-5736"],"issn-type":[{"type":"print","value":"1571-5736"}],"subject":[],"published":{"date-parts":[[2004]]}}}