{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T14:32:01Z","timestamp":1725460321539},"publisher-location":"Boston, MA","reference-count":13,"publisher":"Springer US","isbn-type":[{"type":"print","value":"9781402081484"},{"type":"electronic","value":"9781402081491"}],"license":[{"start":{"date-parts":[[2004,1,1]],"date-time":"2004-01-01T00:00:00Z","timestamp":1072915200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2004]]},"DOI":"10.1007\/1-4020-8149-9_21","type":"book-chapter","created":{"date-parts":[[2006,2,22]],"date-time":"2006-02-22T14:53:33Z","timestamp":1140620013000},"page":"207-216","source":"Crossref","is-referenced-by-count":0,"title":["A Self-Controlled and Dynamically Reconfigurable Architecture"],"prefix":"10.1007","author":[{"given":"Florian","family":"Dittmann","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Achim","family":"Rettberg","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"21_CR1","doi-asserted-by":"crossref","unstructured":"B. Blodget, P. James-Roxby, E. Keller, S. McMillian, and P. Sundararajan. A Self-reconfiguring Platform. In Proceedings of the International Conference on Field Programmable Logic, Lisbon, Portugal, Sept. 2003.","DOI":"10.1007\/978-3-540-45234-8_55"},{"issue":"2","key":"21_CR2","doi-asserted-by":"publisher","first-page":"171","DOI":"10.1145\/508352.508353","volume":"34","author":"K. Compton","year":"2002","unstructured":"K. Compton and S. Hauck. Reconfigurable Computing: A Survey of Systems and Software. ACM Computing Surveys, 34(2): 171\u2013210, June 2002.","journal-title":"ACM Computing Surveys"},{"key":"21_CR3","unstructured":"P. Denyer and D. Renshaw. VLSI Signal Processing: A Bit-Serial Approach. Addison-Wesley Publishing Company, 1985."},{"key":"21_CR4","unstructured":"F. Dittmann, B. Kleinjohann, and A. Rettberg. Efficient Bit-Serial Constant Multiplication for FPGAs. In Proceedings of the 11th NASA Symposium VLSI Design, May 2003."},{"key":"21_CR5","unstructured":"F. Dittmann, A. Rettberg, T. Lehmann, and M. C. Zanella. Invariants for Distributed Local Control Elements of a New Synchronous Bit-Serial Architecture. In Proceedings of the Delta, Perth, Australia, 28\u201330 Jan. 2004."},{"key":"21_CR6","unstructured":"H. M. Jacobson, P. N. Kudva, P. Bose, P. W. Cook, S. E. Schuster, E. G. Mercer, and C. J. Myers. Synchronous Interlocked Pipelines. In 8th International Symposium on Asynchronous Circuits and Systems (ASYNC 02), Apr. 2002."},{"key":"21_CR7","unstructured":"PACT. The XPP White Paper. PACT Informationstechnologie GmbH, 2002."},{"key":"21_CR8","volume-title":"JPEG: Still Image Data Compression Standard","author":"W. B. Pennebaker","year":"1993","unstructured":"W. B. Pennebaker and J. L. Mitchell. JPEG: Still Image Data Compression Standard. van Nostrand Reinhold, New York, 1993."},{"key":"21_CR9","doi-asserted-by":"crossref","unstructured":"J. Resano, D. Mozos, D. Verkest, S. Vernalde, and F. Catthoor. Run-Time Minimization of Reconfiguration Overhead in Dynamically Reconfigurable Systems. In Proceedings of the International Conference on Field Programmable Logic, Lisbon, Portugal, Sept. 2003.","DOI":"10.1007\/978-3-540-45234-8_57"},{"key":"21_CR10","unstructured":"A. Rettberg, M. C. Zanella, C. Bobda, and T. Lehmann. A Fully Self-Timed Bit-Serial Pipeline Architecture for Embedded Systems. In Proceedings of the Design Automation and Test Conference (DATE), Munich, Germany, Mar. 2003."},{"key":"21_CR11","unstructured":"A. Rettberg, M. C. Zanella, T. Lehmann, and C. Bobda. A New Approach of a Self-Timed Bit-Serial Synchronous Pipeline Architecture. In Proceedings of the Rapid System Prototyping Workshop, San Diego, CA, USA, June 2003."},{"key":"21_CR12","unstructured":"A. Rettberg, M. C. Zanella, T. Lehmann, U. Dierkes, and C. Rustemeier. Control Development for Mechatronic Systems with a Fully Reconfig. Pipeline Architecture. In Proc. of the 16th Symposium on Integrated Circuits and System Design, Sao Paulo, Brazil, 2003."},{"key":"21_CR13","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-322-94688-1","volume-title":"Datenflu\u00dfrechner","author":"T. Ungerer","year":"1993","unstructured":"T. Ungerer. Datenflu\u00dfrechner. Teubner Verlag, Stuttgart, 1993."}],"container-title":["IFIP International Federation for Information Processing","Design Methods and Applications for Distributed Embedded Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/1-4020-8149-9_21","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,20]],"date-time":"2019-05-20T17:42:52Z","timestamp":1558374172000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/1-4020-8149-9_21"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2004]]},"ISBN":["9781402081484","9781402081491"],"references-count":13,"URL":"https:\/\/doi.org\/10.1007\/1-4020-8149-9_21","relation":{},"ISSN":["1571-5736"],"issn-type":[{"type":"print","value":"1571-5736"}],"subject":[],"published":{"date-parts":[[2004]]}}}