{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,6]],"date-time":"2025-08-06T12:23:31Z","timestamp":1754483011721},"publisher-location":"Berlin, Heidelberg","reference-count":11,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540677703"},{"type":"electronic","value":"9783540450474"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2000]]},"DOI":"10.1007\/10722167_5","type":"book-chapter","created":{"date-parts":[[2006,12,29]],"date-time":"2006-12-29T22:00:33Z","timestamp":1167429633000},"page":"5-19","source":"Crossref","is-referenced-by-count":9,"title":["An Abstraction Algorithm for the Verification of Generalized C-Slow Designs"],"prefix":"10.1007","author":[{"given":"Jason","family":"Baumgartner","sequence":"first","affiliation":[]},{"given":"Anson","family":"Tripp","sequence":"additional","affiliation":[]},{"given":"Adnan","family":"Aziz","sequence":"additional","affiliation":[]},{"given":"Vigyan","family":"Singhal","sequence":"additional","affiliation":[]},{"given":"Flemming","family":"Andersen","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"issue":"1","key":"5_CR1","first-page":"41","volume":"1","author":"C.E. Leiserson","year":"1983","unstructured":"Leiserson, C.E., Saxe, J.B.: Optimizing Synchronous Systems. Journal of VLSI and Computer Systems\u00a01(1), 41\u201367 (1983)","journal-title":"Journal of VLSI and Computer Systems"},{"issue":"1","key":"5_CR2","doi-asserted-by":"publisher","first-page":"5","DOI":"10.1007\/BF01759032","volume":"6","author":"C.E. Leiserson","year":"1991","unstructured":"Leiserson, C.E., Saxe, J.B.: Retiming Synchronous Circuitry. Algorithmica\u00a06(1), 5\u201335 (1991)","journal-title":"Algorithmica"},{"key":"5_CR3","doi-asserted-by":"crossref","unstructured":"Mador-Haim, S., Fix, L.: Input Elimination and Abstraction in Model Checking. In: Proc. Conf. on Formal Methods in Computer-Aided Design (November 1998)","DOI":"10.1007\/3-540-49519-3_20"},{"key":"5_CR4","doi-asserted-by":"crossref","unstructured":"Hasteer, G., Mathur, A., Banerjee, P.: Efficient Equivalence Checking of Multi- Phase Designs Using Phase Abstraction and Retiming. ACM Transactions on Design Automation of Electronic Systems (October 1998)","DOI":"10.1145\/296333.296348"},{"key":"5_CR5","doi-asserted-by":"crossref","unstructured":"Baumgartner, J., Heyman, T., Singhal, V., Aziz, A.: Model Checking the IBM Gigahertz Processor: An Abstraction Algorithm for High-Performance Netlists. In: Proceedings of the Conference on Computer-Aided Verification (July 1999)","DOI":"10.1007\/3-540-48683-6_9"},{"key":"5_CR6","volume-title":"Communication and Concurrency","author":"R. Milner","year":"1989","unstructured":"Milner, R.: Communication and Concurrency. Prentice Hall, New York (1989)"},{"key":"5_CR7","series-title":"Computer Science Series","volume-title":"Switching and Finite Automata Theory","author":"Z. Kohavi","year":"1970","unstructured":"Kohavi, Z.: Switching and Finite Automata Theory. Computer Science Series. McGraw-Hill Book Company, New York (1970)"},{"issue":"3","key":"5_CR8","doi-asserted-by":"publisher","first-page":"843","DOI":"10.1145\/177492.177725","volume":"16","author":"O. Grumberg","year":"1994","unstructured":"Grumberg, O., Long, D.E.: Module Checking and Modular Verification. ACM Transactions on Programming Languages and Systems\u00a016(3), 843\u2013871 (1994)","journal-title":"ACM Transactions on Programming Languages and Systems"},{"key":"5_CR9","unstructured":"Clarke, E.M., Emerson, E.A.: Design and Synthesis of Synchronization Skeletons Using Branching Time Logic. Proc. Workshop on Logic of Programs (1981)"},{"key":"5_CR10","doi-asserted-by":"crossref","unstructured":"Beer, I., Ben-David, S., Eisner, C., Landver, A.: RuleBase: an Industry-Oriented Formal Verification Tool. In: Proc. Design Automation Conference (June 1996)","DOI":"10.1145\/240518.240642"},{"key":"5_CR11","doi-asserted-by":"crossref","unstructured":"Hu, A.J., York, G., Dill, D.L.: New Techniques for Efficient Verification with Implicitly Conjoined BDDs. In: Proceedings of the Design Automation Conference (June 1994)","DOI":"10.1145\/196244.196377"}],"container-title":["Lecture Notes in Computer Science","Computer Aided Verification"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/10722167_5","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,3,19]],"date-time":"2019-03-19T16:53:16Z","timestamp":1553014396000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/10722167_5"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2000]]},"ISBN":["9783540677703","9783540450474"],"references-count":11,"URL":"https:\/\/doi.org\/10.1007\/10722167_5","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2000]]}}}