{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T18:05:00Z","timestamp":1725559500002},"publisher-location":"Berlin, Heidelberg","reference-count":13,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540269694"},{"type":"electronic","value":"9783540316640"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2005]]},"DOI":"10.1007\/11512622_35","type":"book-chapter","created":{"date-parts":[[2010,7,14]],"date-time":"2010-07-14T21:56:09Z","timestamp":1279144569000},"page":"324-333","source":"Crossref","is-referenced-by-count":0,"title":["A Radix-8 Multiplier Design and Its Extension for Efficient Implementation of Imaging Algorithms"],"prefix":"10.1007","author":[{"given":"David","family":"Guevorkian","sequence":"first","affiliation":[]},{"given":"Petri","family":"Liuha","sequence":"additional","affiliation":[]},{"given":"Aki","family":"Launiainen","sequence":"additional","affiliation":[]},{"given":"Konsta","family":"Punkka","sequence":"additional","affiliation":[]},{"given":"Ville","family":"Lappalainen","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"35_CR1","doi-asserted-by":"publisher","first-page":"111","DOI":"10.1109\/TC.2005.32","volume":"54","author":"P.M. Seidel","year":"2005","unstructured":"Seidel, P.M., McFearin, L.D., Matula, D.W.: Secondary radix recodings for higher radix multipliers. IEEE Trans. Comput.\u00a054, 111\u2013123 (2005)","journal-title":"IEEE Trans. Comput."},{"key":"35_CR2","doi-asserted-by":"publisher","first-page":"1201","DOI":"10.1109\/12.736430","volume":"47","author":"H.A. Al-Twaijry","year":"1998","unstructured":"Al-Twaijry, H.A., Flynn, M.J.: Technology scaling effects on multipliers. IEEE Trans. Computers\u00a047, 1201\u20131215 (1998)","journal-title":"IEEE Trans. Computers"},{"key":"35_CR3","unstructured":"Shah, S., Al-Khalili, A.J., Al-Khalili, D.: Secondary radix recodings for higher radix multipliers. In: 12th Int. Conf. On Microelectronics, ICM 2000, pp. 75\u201380 (2000)"},{"key":"35_CR4","doi-asserted-by":"publisher","first-page":"1006","DOI":"10.1109\/12.57039","volume":"39","author":"H. Sam","year":"1990","unstructured":"Sam, H., Gupta, A.: Generalized multibit recoding of two\u2019s complement binary numbers and its proof with applications in multiplier implementations. IEEE Trans. Computers\u00a039, 1006\u20131015 (1990)","journal-title":"IEEE Trans. Computers"},{"key":"35_CR5","doi-asserted-by":"crossref","unstructured":"Conway, C., Swartzlander Jr., E.: Product select multiplier. In: IEEE 28th Asilomar Conf. On Signals, Systems, and Computers, pp. 1388\u20131392 (1994)","DOI":"10.1109\/ACSSC.1994.471685"},{"key":"35_CR6","doi-asserted-by":"crossref","unstructured":"Schwarz, E., Averill III, R., Sigal, L.: A radix-8 cmos s\/390 multiplier. In: 13th IEEE Symposium on Computer Arithmetic, pp. 2\u20139 (1997)","DOI":"10.1109\/ARITH.1997.614873"},{"key":"35_CR7","unstructured":"Williams, T.: US patent No 4,965,762. Mixed Size Radix Recoded Multiplier (1990)"},{"key":"35_CR8","doi-asserted-by":"publisher","first-page":"656","DOI":"10.1109\/82.618039","volume":"44","author":"B. Cherkauer","year":"1997","unstructured":"Cherkauer, B., Friedman, E.: A hybrid radix-4\/radix-8 low power signed multiplier architecture. IEEE Trans. Circuits and Systems\u2013II, Analog and Digital Signal Processing\u00a044, 656\u2013659 (1997)","journal-title":"IEEE Trans. Circuits and Systems\u2013II, Analog and Digital Signal Processing"},{"key":"35_CR9","unstructured":"Chen, H.Y., Gai, W.X.: US patent No 5,828,590. Multiplier based on a variable radix multiplier coding (1998)"},{"key":"35_CR10","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"118","DOI":"10.1007\/978-3-540-27776-7_13","volume-title":"Computer Systems: Architectures, Modeling, and Simulation","author":"D. Guevorkian","year":"2004","unstructured":"Guevorkian, D., Liuha, P., Launiainen, A., Lappalainen, V.: A family of accelerators for matrix-vector arithmetics based on high-radix multiplier structures. In: Pimentel, A.D., Vassiliadis, S. (eds.) SAMOS 2004. LNCS, vol.\u00a03133, pp. 118\u2013127. Springer, Heidelberg (2004)"},{"key":"35_CR11","doi-asserted-by":"crossref","unstructured":"Guevorkian, D., Launiainen, A., Lappalainen, V., Liuha, P., Punkka, K.: A method for designing high-radix multiplier based processing units for multimedia applications. IEEE Trans. Circuits and Sustems for Video Technology (2005) (to appear)","DOI":"10.1109\/TCSVT.2005.846436"},{"key":"35_CR12","doi-asserted-by":"crossref","unstructured":"Guevorkian, D., Launiainen, A., Liuha, P., Lappalainen, V.: Architectures for the sum of absolute differences operation. In: IEEE Workshop on Signal Processing Systems (SIPS 2002), pp. 57\u201362 (2002)","DOI":"10.1109\/SIPS.2002.1049685"},{"key":"35_CR13","unstructured":"Texas Instruments (2001), \n                    \n                      http:\/\/www-s.ti.com\/sc\/psheets\/srst143\/srst143.pdf"}],"container-title":["Lecture Notes in Computer Science","Embedded Computer Systems: Architectures, Modeling, and Simulation"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/11512622_35.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,27]],"date-time":"2021-04-27T06:45:37Z","timestamp":1619505937000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/11512622_35"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2005]]},"ISBN":["9783540269694","9783540316640"],"references-count":13,"URL":"https:\/\/doi.org\/10.1007\/11512622_35","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2005]]}}}