{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,3]],"date-time":"2026-03-03T15:54:30Z","timestamp":1772553270661,"version":"3.50.1"},"publisher-location":"Berlin, Heidelberg","reference-count":9,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"value":"9783540281283","type":"print"},{"value":"9783540318231","type":"electronic"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2005]]},"DOI":"10.1007\/11535409_10","type":"book-chapter","created":{"date-parts":[[2010,9,28]],"date-time":"2010-09-28T05:23:48Z","timestamp":1285651428000},"page":"74-80","source":"Crossref","is-referenced-by-count":1,"title":["CA-Ex: A Tuning-Incremental Methodology for Communication Architectures in Embedded Systems"],"prefix":"10.1007","author":[{"given":"Haili","family":"Wang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jinian","family":"Bian","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yawen","family":"Niu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kun","family":"Tong","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yunfeng","family":"Wang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"10_CR1","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"74","DOI":"10.1007\/3-540-45874-3_5","volume-title":"Embedded Processor Design Challenges","author":"V.D. Zivkovic","year":"2002","unstructured":"Zivkovic, V.D., Lieverse, P.: An Overview of Methodologies and Tools in the Field of System-Level Design. In: Deprettere, F., Teich, J., Vassiliadis, S. (eds.) SAMOS 2001. LNCS, vol.\u00a02268, pp. 74\u201389. Springer, Heidelberg (2002)"},{"key":"10_CR2","unstructured":"Calvez, J.-P., Perrier, V.: SOC Architecting and Design with CoFluent Studio, Concepts and Methodology -Part I, available at http:\/\/www.cofluent.com"},{"issue":"6","key":"10_CR3","doi-asserted-by":"publisher","first-page":"952","DOI":"10.1109\/TCAD.2004.828127","volume":"23","author":"K. Lahiri","year":"2004","unstructured":"Lahiri, K., Raghunathan, A., Dey, S.: Design Space Exploration for Optimizing On-Chip Communication Architecture. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems\u00a023(6), 952\u2013961 (2004)","journal-title":"IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems"},{"key":"10_CR4","doi-asserted-by":"crossref","unstructured":"Renner, F.-M., Becker, J., Glesner, M.: Automated Communication Synthesis for Architectureprecise Rapid Prototyping of Real-Time Embedded Systems. In: IEEE International Workshop on Rapid System Prototyping, pp. 154\u2013159 (2000)","DOI":"10.1109\/IWRSP.2000.855215"},{"issue":"5","key":"10_CR5","doi-asserted-by":"publisher","first-page":"472","DOI":"10.1109\/92.894152","volume":"8","author":"P. Eles","year":"2000","unstructured":"Eles, P., Doboli, A., Pop, P., Peng, Z.B.: Scheduling with Bus Access Optimization for Distributed Embedded Systems. IEEE Trans. on Very Large Scale Integration (VLSI) Systems\u00a08(5), 472\u2013491 (2000)","journal-title":"IEEE Trans. on Very Large Scale Integration (VLSI) Systems"},{"key":"10_CR6","doi-asserted-by":"crossref","unstructured":"Zhu, X.P., Malik, S.: A Hierarchical Modeling Framework for On-Chip Communication Architecture. In: IEEE\/ACM International Conference on Computer Aided Design, pp. 663- 670 (November 2002)","DOI":"10.1145\/774572.774670"},{"key":"10_CR7","doi-asserted-by":"crossref","unstructured":"Russell, J.T., Jacome, M.F.: Architecture-Level Performance Evaluation of Component- Based Embedded Systems. In: Proc. of the 40th Design Automation Conference, pp. 394\u2013401 (2003)","DOI":"10.1145\/775832.775936"},{"key":"10_CR8","unstructured":"Wang, H., Wu, Q., Bian, J., et al.: A Novel Virtual-Real Component Synthesis Approach in SoC Design. In: The 8th International Conference on CAD\/Graphics 2003, Macau, October 2003, pp. 151\u2013156 (2003)"},{"key":"10_CR9","unstructured":"Open SystemC Initiative (OSCI), available at: http:\/\/www.systemc.org"}],"container-title":["Lecture Notes in Computer Science","Embedded Software and Systems"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/11535409_10.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,2,26]],"date-time":"2025-02-26T03:09:07Z","timestamp":1740539347000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/11535409_10"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2005]]},"ISBN":["9783540281283","9783540318231"],"references-count":9,"URL":"https:\/\/doi.org\/10.1007\/11535409_10","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"value":"0302-9743","type":"print"},{"value":"1611-3349","type":"electronic"}],"subject":[],"published":{"date-parts":[[2005]]}}}