{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T20:08:34Z","timestamp":1725566914603},"publisher-location":"Berlin, Heidelberg","reference-count":16,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540290131"},{"type":"electronic","value":"9783540320807"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2005]]},"DOI":"10.1007\/11556930_67","type":"book-chapter","created":{"date-parts":[[2010,9,28]],"date-time":"2010-09-28T21:18:41Z","timestamp":1285708721000},"page":"657-665","source":"Crossref","is-referenced-by-count":0,"title":["Efficient Clock Distribution Scheme for VLSI RNS-Enabled Controllers"],"prefix":"10.1007","author":[{"given":"Daniel","family":"Gonz\u00e1lez","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Luis","family":"Parrilla","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Antonio","family":"Garc\u00eda","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Encarnaci\u00f3n","family":"Castillo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Antonio","family":"Lloris","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"67_CR1","unstructured":"Astr\u00f6m, K.J., H\u00e4gglund, T.: PID Control. Theory, Design and Tunning, 2ended., Instrument Society of America. Research Triangle Par., NC (1995)"},{"key":"67_CR2","volume-title":"Residue Arithmetic and Its Applications to Computer Technology","author":"N.S. Szabo","year":"1967","unstructured":"Szabo, N.S., Tanaka, R.I.: Residue Arithmetic and Its Applications to Computer Technology. McGraw-Hill, New York (1967)"},{"key":"67_CR3","unstructured":"Parrilla, L., Garc\u00eda, A., Lloris, A.: Implementation of High Performance PID Controllers using RNS and Field-Programmable Devices. In: Proc. of 2000 IFAC Workshop on Digital Control PID 2000, Terrassa, April 5-7, pp. 628\u2013631 (2000)"},{"issue":"1","key":"67_CR4","doi-asserted-by":"publisher","first-page":"62","DOI":"10.1109\/4.16303","volume":"24","author":"J. Yuan","year":"1989","unstructured":"Yuan, J., Svensson, C.: High-speed CMOS Circuit Technique. IEEE Journal of Solid State Circuits\u00a024(1), 62\u201370 (1989)","journal-title":"IEEE Journal of Solid State Circuits"},{"key":"67_CR5","doi-asserted-by":"publisher","first-page":"1627","DOI":"10.1109\/4.726547","volume":"33","author":"D.W. Bailey","year":"1998","unstructured":"Bailey, D.W., Benchsneider, B.J.: Clocking Design and Analysis for a 600-MHz Alpha Microprocessor. IEEE Journal of Solid State Circuits\u00a033, 1627\u20131633 (1998)","journal-title":"IEEE Journal of Solid State Circuits"},{"issue":"5","key":"67_CR6","doi-asserted-by":"publisher","first-page":"395","DOI":"10.1109\/81.296331","volume":"41","author":"P. Ramanathan","year":"1994","unstructured":"Ramanathan, P., Dupont, A.J., Shin, K.G.: Clock Distribution in General VLSI Circuits. IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications\u00a041(5), 395\u2013404 (1994)","journal-title":"IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications"},{"issue":"2","key":"67_CR7","doi-asserted-by":"publisher","first-page":"167","DOI":"10.1109\/92.766743","volume":"7","author":"J. Yoo","year":"1999","unstructured":"Yoo, J., Gopalakrishnan, G., Smith, K.F.: Timing Constraints for High-speed Counterflowclocked Pipelining. IEEE Transactions on VLSI Systems\u00a07(2), 167\u2013173 (1999)","journal-title":"IEEE Transactions on VLSI Systems"},{"issue":"2","key":"67_CR8","doi-asserted-by":"publisher","first-page":"149","DOI":"10.1109\/81.269051","volume":"41","author":"W.D. Grover","year":"1994","unstructured":"Grover, W.D.: A New Method for Clock Distribution. IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications\u00a041(2), 149\u2013160 (1994)","journal-title":"IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications"},{"key":"67_CR9","doi-asserted-by":"crossref","unstructured":"Jackson, M.A.B., Srinivasan, A., Kuh, E.S.: Clock Routing for High Performance IC.s. In: 27th ACM\/IEEE Design Automation Conference (1990)","DOI":"10.1145\/123186.123406"},{"issue":"5","key":"67_CR10","doi-asserted-by":"publisher","first-page":"284","DOI":"10.1109\/TC.1983.1676220","volume":"32","author":"D.F. Wann","year":"1983","unstructured":"Wann, D.F., Franklin, N.A.: Asynchronous and Clocked Control Structures for VLSI Based Interconnect Networks. IEEE Transactions on Computers\u00a032(5), 284\u2013293 (1983)","journal-title":"IEEE Transactions on Computers"},{"key":"67_CR11","doi-asserted-by":"crossref","first-page":"87","DOI":"10.1007\/978-1-4684-5511-3_6","volume-title":"Concurrent Computations (Algorithms, Architecture, and Technology)","author":"M. Hatamian","year":"1988","unstructured":"Hatamian, M.: Chapter 6, Understanding clock skew in synchronous systems. In: Tewksbury, S.K., Dickinson, B.W., Schwartz, S.C. (eds.) Concurrent Computations (Algorithms, Architecture, and Technology), pp. 87\u201396. Plenum Publishing, New York (1988)"},{"key":"67_CR12","doi-asserted-by":"crossref","unstructured":"Friedman, E.G.: Clock Distribution Networks in Synchronous Digital Integrated Circuits. Proceedings of the IEEE\u00a089(5) (2001)","DOI":"10.1109\/5.929649"},{"issue":"2","key":"67_CR13","doi-asserted-by":"publisher","first-page":"240","DOI":"10.1109\/JSSC.1986.1052510","volume":"21","author":"E.G. Friedman","year":"1986","unstructured":"Friedman, E.G., Powell, S.: Design and Analysis of an Hierarchical Clock Distribution System for Synchronous Cell\/macrocell VLSI. IEEE Journal of Solid State Circuits\u00a021(2), 240\u2013246 (1986)","journal-title":"IEEE Journal of Solid State Circuits"},{"key":"67_CR14","doi-asserted-by":"publisher","first-page":"869","DOI":"10.1109\/JSSC.1986.1052620","volume":"21","author":"M. Shoji","year":"1986","unstructured":"Shoji, M.: Elimination of Process-dependent Clock skew in CMOS VLSI. IEEE Journal of Solid State Circuits\u00a021, 869\u2013880 (1986)","journal-title":"IEEE Journal of Solid State Circuits"},{"key":"67_CR15","volume-title":"Residue Number System Arithmetic: Modern Applications in Digital Signal Processing","author":"M.A. Soderstrand","year":"1986","unstructured":"Soderstrand, M.A., Jenkins, W.K., Jullien, G.A., Taylor, F.J.: Residue Number System Arithmetic: Modern Applications in Digital Signal Processing. IEEE Press, Los Alamitos (1986)"},{"key":"67_CR16","unstructured":"MOSIS Process Information: Hewlett Packard AMOS14TB, \n                    \n                      http:\/\/www.mosis.org\/technical\/processes\/proc-hp-amos14tb.html"}],"container-title":["Lecture Notes in Computer Science","Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/11556930_67.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,27]],"date-time":"2021-04-27T03:08:15Z","timestamp":1619492895000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/11556930_67"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2005]]},"ISBN":["9783540290131","9783540320807"],"references-count":16,"URL":"https:\/\/doi.org\/10.1007\/11556930_67","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2005]]}}}