{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T20:56:49Z","timestamp":1725569809917},"publisher-location":"Berlin, Heidelberg","reference-count":22,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540297901"},{"type":"electronic","value":"9783540314851"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2005]]},"DOI":"10.1007\/11574859_8","type":"book-chapter","created":{"date-parts":[[2005,12,23]],"date-time":"2005-12-23T04:42:12Z","timestamp":1135312932000},"page":"107-119","source":"Crossref","is-referenced-by-count":4,"title":["Context-Independent Codes for Off-Chip Interconnects"],"prefix":"10.1007","author":[{"given":"Kartik","family":"Mohanram","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Scott","family":"Rixner","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"8_CR1","doi-asserted-by":"crossref","unstructured":"Edenfeld, D., Kahng, A.B., Rodgers, M., Zorian, Y.: 2003 Technology roadmap for semiconductors. IEEE Computer\u00a037(1) (2004)","DOI":"10.1109\/MC.2004.1260725"},{"key":"8_CR2","unstructured":"International technology roadmap for semiconductors (2003)"},{"key":"8_CR3","doi-asserted-by":"crossref","unstructured":"Delaluz, V., Kandemir, M., Vijaykrishnan, N., Sivasubramaniam, A., Irwin, M.: DRAM energy management using software and hardware directed power mode control. In: Proceedings of the International Symposium on High-Performance Computer Architecture (2001)","DOI":"10.1109\/HPCA.2001.903260"},{"key":"8_CR4","doi-asserted-by":"crossref","unstructured":"Fan, X., Ellis, C., Lebeck, A.: Memory controller policies for DRAM power management. In: Proceedings of the International Symposium on Low Power Electronics and Design (2001)","DOI":"10.1145\/383082.383118"},{"key":"8_CR5","doi-asserted-by":"crossref","DOI":"10.1007\/978-1-4757-2849-1","volume-title":"Custom Memory Management Methodology: Exploration of Memory Organisation for Embedded Multimedia System Design","author":"F. Catthoor","year":"1998","unstructured":"Catthoor, F., Wuytack, S., DeGreef, E., Balasa, F., Nachtergaele, L., Vandecappelle, A.: Custom Memory Management Methodology: Exploration of Memory Organisation for Embedded Multimedia System Design. Kluwer Academic Publishers, Dordrecht (1998)"},{"key":"8_CR6","doi-asserted-by":"crossref","unstructured":"Kulkarni, C., Catthoor, F., DeMan, H.: Code transformations for low power caching in embedded multimedia processors. In: Proceedings of the International Parallel Processing Symposium (1998)","DOI":"10.1109\/IPPS.1998.669928"},{"key":"8_CR7","doi-asserted-by":"crossref","unstructured":"Kulkarni, C., Miranda, M., Ghez, C., Catthoor, F., Man, H.D.: Cache conscious data layout organization for embedded multimedia applications. In: Proceedings of the Design Automation and Test in Europe Conference (2001)","DOI":"10.1109\/DATE.2001.915099"},{"key":"8_CR8","doi-asserted-by":"crossref","unstructured":"Panda, P.R., Dutt, N.D., Nicolau, A.: On-chip vs. off-chip memory: the data partitioning problem in embedded processor-based systems. ACM Transactions on Design Automation of Electronic Systems\u00a05(3) (2000)","DOI":"10.1145\/348019.348570"},{"key":"8_CR9","doi-asserted-by":"crossref","unstructured":"Benini, L., Macii, A., Poncino, M., Scarsi, R.: Architectures and synthesis algorithms for power-efficient bus interfaces. IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems\u00a019(9) (2000)","DOI":"10.1109\/43.863637"},{"key":"8_CR10","doi-asserted-by":"crossref","unstructured":"Ramprasad, S., Shanbag, N.R., Hajj, I.N.: A coding framework for low power address and data buses. IEEE Transactions on VLSI Systems\u00a07(2) (1999)","DOI":"10.1109\/92.766748"},{"key":"8_CR11","doi-asserted-by":"crossref","unstructured":"Sotiriadis, P., Chandrakasan, A.: A bus energy model for deep sub-micron technology. IEEE Transactions on VLSI Systems\u00a010(3) (2002)","DOI":"10.1109\/TVLSI.2002.1043337"},{"key":"8_CR12","doi-asserted-by":"crossref","unstructured":"Sotiriadis, P., Tarokh, V., Chandrakasan, A.P.: Energy reduction in VLSI computation modules: An information-theoretic approach. IEEE Transactions on Information Theory\u00a049(4) (2003)","DOI":"10.1109\/TIT.2003.809601"},{"key":"8_CR13","doi-asserted-by":"crossref","unstructured":"Stan, M.R., Burleson, W.P.: Low-power encodings for global communication in CMOS VLSI. IEEE Transactions on VLSI Systems\u00a05(4) (1997)","DOI":"10.1109\/92.645071"},{"key":"8_CR14","doi-asserted-by":"crossref","unstructured":"Stan, M.R., Burleson, W.P.: Bus invert coding for low power I\/O. IEEE Transactions on VLSI Systems\u00a03(1) (1995)","DOI":"10.1109\/92.365453"},{"key":"8_CR15","doi-asserted-by":"crossref","unstructured":"Benini, L., DeMicheli, G., Macii, E., Sciuto, D., Silvano, C.: Asymptotic zero-transition activity encoding for address busses in low-power microprocessor-based systems. In: Proceedings of the Great Lakes Symposium on VLSI (1997)","DOI":"10.1109\/GLSV.1997.580414"},{"key":"8_CR16","doi-asserted-by":"crossref","unstructured":"Musoll, E., Lang, T., Cortadella, J.: Exploiting locality of memory references to reduce the address bus energy. In: Proceedings of the International Symposium on Low Power Electronics Design (1997)","DOI":"10.1145\/263272.263334"},{"key":"8_CR17","doi-asserted-by":"crossref","unstructured":"Yang, J., Gupta, R., Zhang, C.: Frequent value encoding for low power data buses. ACM Transactions on Design Automation of Electronic Systems\u00a09(3) (2004)","DOI":"10.1145\/1013948.1013953"},{"key":"8_CR18","unstructured":"Samsung: 256\/288 Mbit RDRAM K4R571669D\/K4R881869D data sheet, version 1.4 (2002)"},{"key":"8_CR19","doi-asserted-by":"crossref","unstructured":"Austin, T., Larson, E., Ernst, D.: SimpleScalar: An infrastructure for computer system modeling. IEEE Computer\u00a035(2) (2002)","DOI":"10.1109\/2.982917"},{"key":"8_CR20","doi-asserted-by":"crossref","unstructured":"Clark, L.T., Hoffman, E.J., Miller, J., Biyani, M., Liao, Y., Strazdus, S., Morrow, M., Velarde, K.E., Yarch, M.A.: An embedded 32-b microprocessor core for low-power and high-performance applications. IEEE Journal of Solid-state Circuits\u00a036(11) (2001)","DOI":"10.1109\/4.962279"},{"key":"8_CR21","unstructured":"Micron: 512Mb: x4, x8, x16 SDRAM MT48LC32M16A2 data sheet (2004)"},{"key":"8_CR22","doi-asserted-by":"crossref","unstructured":"Guthaus, M.R., Ringenberg, J.S., Ernst, D., Austin, T.M., Mudge, T., Brown, R.B.: MiBench: A free, commercially representative embedded benchmark suite. In: IEEE Annual Workshop on Workload Characterization (2001)","DOI":"10.1109\/WWC.2001.990739"}],"container-title":["Lecture Notes in Computer Science","Power-Aware Computer Systems"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/11574859_8.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,27]],"date-time":"2021-04-27T06:42:23Z","timestamp":1619505743000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/11574859_8"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2005]]},"ISBN":["9783540297901","9783540314851"],"references-count":22,"URL":"https:\/\/doi.org\/10.1007\/11574859_8","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2005]]}}}