{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T16:51:45Z","timestamp":1725468705218},"publisher-location":"Berlin, Heidelberg","reference-count":16,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540400561"},{"type":"electronic","value":"9783540400585"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2006]]},"DOI":"10.1007\/11859802_38","type":"book-chapter","created":{"date-parts":[[2006,8,26]],"date-time":"2006-08-26T09:13:27Z","timestamp":1156583607000},"page":"416-422","source":"Crossref","is-referenced-by-count":1,"title":["The Challenges of Efficient Code-Generation for Massively Parallel Architectures"],"prefix":"10.1007","author":[{"given":"Jason M","family":"McGuiness","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Colin","family":"Egan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Bruce","family":"Christianson","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Guang","family":"Gao","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"38_CR1","doi-asserted-by":"crossref","unstructured":"Alm\u00e1sil, G., Cascaval, C., Casta\u00f1os, J.G., Denneau, M., Lieber, D., Moreira, J.E., Warren, H.S.: Dissecting Cyclops: Detailed Analysis of a Multithreaded Architecture. ACM SIGARCH Computer Architecture News\u00a031 (March 2003)","DOI":"10.1145\/773365.773369"},{"key":"38_CR2","doi-asserted-by":"crossref","unstructured":"Cascaval, C., Casta\u00f1os, J.G., Ceze, L., Denneau, M., Gupta, M., Lieber, D., Moreira, J.E., Strauss, K., Warren, H.S.: Evaluation of a Multithreaded Architecture for Cellular Computing. In: 8th International Symposium on High-Performance Computer Architecture (HPCA) (2002)","DOI":"10.1109\/HPCA.2002.995720"},{"key":"38_CR3","unstructured":"Cavalherio, G.G.H., Doreille, M., Galil\u00e9e, F., Gautier, T., Roch, J.-L.: Scheduling Parallel Programs on Non-Uniform Memory Architectures. In: HPCA Conference \u2013 Workshop on Parallel Computing for Irregular Applications WPCIA1, Orlando, USA (January 1999)"},{"key":"38_CR4","unstructured":"del Cuvillo, J.B., Zhu, W., Hu, Z., Gao, G.R.: FAST: A Functionally Accurate Simulation Toolset for the Cyclops-64 Cellular Architecture. In: Workshop on Modeling, Benchmarking and Simulation (MoBS), held in conjunction with the 32nd Annual International Symposium on Computer Architecture (ISCA 2005), Madison, Wisconsin, June 4 (2005)"},{"key":"38_CR5","doi-asserted-by":"crossref","unstructured":"del Cuvillo, J.B., Zhu, W., Hu, Z., Gao, G.R.: TiNy Threads: a Thread Virtual Machine for the Cyclops64 Cellular Architecture. In: Fifth Workshop on Massively Parallel Processing (WMPP), held in conjunction with the 19th International Parallel and Distributed Processing System, Denver, Colorado, April 3 - 8 (2005)","DOI":"10.1109\/IPDPS.2005.434"},{"key":"38_CR6","volume-title":"Proceedings of the Design, Automation and Test in Europe Conference and Exhibition","author":"A. Duller","year":"2005","unstructured":"Duller, A., Towner, D., Panesar, G., Gray, A., Robbins, W.: picoArray technology: the tool\u2019s story. In: Proceedings of the Design, Automation and Test in Europe Conference and Exhibition. IEEE, Los Alamitos (2005)"},{"key":"38_CR7","doi-asserted-by":"crossref","unstructured":"Gao, G.R., Sarkar, V.: Location Consistency - a New Memory Model and Cache Consistency Protocol. IEEE Transactions on Computers\u00a049(8) (August 2000)","DOI":"10.1109\/12.868026"},{"key":"38_CR8","doi-asserted-by":"crossref","unstructured":"Gao, G.R., Theobald, K.B., Govindarajan, R., Leung, C., Hu, Z., Wu, H., Lu, J., del Cuvillo, J., Jacquet, A., Janot, V., Sterling, T.L.: Programming Models and System Software for Future High-End Computing Systems: Work-in-Progress. In: International Parallel and Distributed Processing Symposium (IPDPS 2003), Nice, France, April 22 - 26 (2003)","DOI":"10.1109\/IPDPS.2003.1213378"},{"key":"38_CR9","unstructured":"El-Ghazawi, T.A., Carlson, W.W., Draper, J.M.: UPC Language Specifications V1.1.1 (October 2003)"},{"key":"38_CR10","doi-asserted-by":"crossref","unstructured":"Kakulavarapu, P., Morrone, C.J., Theobald, K., Amaral, J.N., Gao, G.R.: A Comparative Performance Study of Fine-Grain Multi-threading on Distributed Memory Machines. In: 19th IEEE International Performance, Computing and Communication Conference-IPCCC 2000, Phoenix, Arizona, USA, February 20-22 (2000)","DOI":"10.1109\/PCCC.2000.830367"},{"key":"38_CR11","unstructured":"M c Guiness, J.M.: A DIMES Demonstration Application: Mandelbrot-Set Generation Using a Work-Stealing Algorithm. CAPSL Technical Note 11, Department of Electrical and Computer Engineering, University of Delaware, Newark, Delaware (June 2003), ftp:\/\/ftp.capsl.udel.edu\/pub\/doc\/notes"},{"key":"38_CR12","volume-title":"The Fractal Geometry of Nature","author":"B.B. Mandelbrot","year":"1982","unstructured":"Mandelbrot, B.B.: The Fractal Geometry of Nature. W.H.Freeman & Co., New York (1982)"},{"key":"38_CR13","doi-asserted-by":"crossref","unstructured":"Rodenas, D., Martorell, X., Ayguade, E., Labarta, J., Almasi, G., Cascaval, C., Castanos, J., Moreira, J.: Optimizing NANOS OpenMP for the IBM Cyclops Multithreaded Architecture. In: 19th IEEE International Parallel and Distributed Processing Symposium, vol.\u00a01, p. 110 (2005)","DOI":"10.1109\/IPDPS.2005.317"},{"key":"38_CR14","doi-asserted-by":"crossref","unstructured":"Sakane, H., Yakay, L., Karna, V., Leung, C., Gao, G.R.: DIMES: An Iterative Emulation Platform for Multiprocessor-System-on-Chip Designs. In: IEEE International Conference on Field-Programmable Technology, Tokyo, Japan, December 15-17 (2003)","DOI":"10.1109\/FPT.2003.1275754"},{"issue":"1","key":"38_CR15","doi-asserted-by":"publisher","first-page":"20","DOI":"10.1145\/216585.216588","volume":"23","author":"W. Wulf","year":"1995","unstructured":"Wulf, W., McKee, S.: Hitting the memory wall: Implications of the obvious. Computer Architecture News\u00a023(1), 20\u201324 (1995)","journal-title":"Computer Architecture News"},{"key":"38_CR16","unstructured":"Zhang, Y., Zhu., W., Chen, F., Hu, Z., Gao, G.R.: Sequential Consistency Revisited: The Sufficient Conditions and Method to Reason Consistency Model of a Multiprocessor-on-a chip Architecture. In: The IASTED International Conference on Parallel and Distributed Computing and Networks (PDCN2005), Innsbruck, Austria, February 15 - 17 (2005)"}],"container-title":["Lecture Notes in Computer Science","Advances in Computer Systems Architecture"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/11859802_38.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,11,17]],"date-time":"2020-11-17T19:43:36Z","timestamp":1605642216000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/11859802_38"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2006]]},"ISBN":["9783540400561","9783540400585"],"references-count":16,"URL":"https:\/\/doi.org\/10.1007\/11859802_38","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2006]]}}}