{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T22:01:45Z","timestamp":1725487305667},"publisher-location":"Berlin, Heidelberg","reference-count":21,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540001997"},{"type":"electronic","value":"9783540361909"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2002]]},"DOI":"10.1007\/3-540-36190-1_1","type":"book-chapter","created":{"date-parts":[[2007,7,16]],"date-time":"2007-07-16T12:24:21Z","timestamp":1184588661000},"page":"1-33","source":"Crossref","is-referenced-by-count":2,"title":["Composing Snippets"],"prefix":"10.1007","author":[{"given":"Igor","family":"Benko","sequence":"first","affiliation":[]},{"given":"Jo","family":"Ebergen","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2002,11,27]]},"reference":[{"key":"1_CR1","unstructured":"Igor Benko. ECF Processes and Asynchronous Circuit Design. PhD thesis, University of Waterloo, Department of Computer Science, file http:\/\/plg.uwaterloo.ca\/pub\/maveric\/reports\/All-reports\/IBThesis.pdf , 1999. 4"},{"key":"1_CR2","doi-asserted-by":"crossref","unstructured":"Igor Benko and Jo Ebergen. Delay-insensitive solutions to the committee problem. In Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pages 228\u2013237. IEEE Computer Society Press, November 1994. 2","DOI":"10.1109\/ASYNC.1994.656315"},{"key":"1_CR3","doi-asserted-by":"publisher","first-page":"25","DOI":"10.1016\/0169-7552(87)90085-7","volume":"14","author":"T. Bolognesi","year":"1987","unstructured":"Tomaso Bolognesi and Ed Brinksma. Introduction to the ISO specification language LOTOS. Computer Networks and ISDN Systems, 14:25\u201359, 1987. 2","journal-title":"Computer Networks and ISDN Systems"},{"key":"1_CR4","doi-asserted-by":"crossref","unstructured":"Janusz A. Brzozowski, Scott Hauck, and Carl-Johan H. Seger. Design of asynchronous circuits. In Brzozowski, J. A. and Seger, C.-J. H. Asynchronous Circuits, Chapter 15. Springer-Verlag, 1995. 2","DOI":"10.1007\/978-1-4612-4210-9_15"},{"key":"1_CR5","doi-asserted-by":"crossref","unstructured":"M. E. Bush and M. B. Josephs. Some limitations to speed-independence in asynchronous circuits. In Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems. IEEE Computer Society Press, March 1996. 2","DOI":"10.1109\/ASYNC.1996.494442"},{"key":"1_CR6","unstructured":"B. A. Davey and H. A. Priestley. Introduction to Lattices and Order. Cambridge University Press, 1990."},{"key":"1_CR7","doi-asserted-by":"crossref","unstructured":"Al Davis and Steven M. Nowick. Asynchronous circuit design: Motivation, background, and methods. In Graham Birtwistle and Al Davis, editors, Asynchronous Digital Circuit Design, Workshops in Computing, pages 1\u201349. Springer-Verlag, 1995. 2","DOI":"10.1007\/978-1-4471-3575-3_1"},{"key":"1_CR8","doi-asserted-by":"publisher","first-page":"115","DOI":"10.1007\/BF00289519","volume":"1","author":"E. W. Dijkstra","year":"1971","unstructured":"Edsger W. Dijkstra. Hierarchical ordering of sequential processes. Acta Informatica, 1:115\u2013138, 1971. 28, 29, 31","journal-title":"Acta Informatica"},{"key":"1_CR9","doi-asserted-by":"crossref","unstructured":"David L. Dill. Trace Theory for Automatic Hierachical Verification of Speed-Independent Circuits. ACM Distinguished Dissertations. MIT Press, 1989. 2","DOI":"10.7551\/mitpress\/6874.001.0001"},{"issue":"3","key":"1_CR10","doi-asserted-by":"publisher","first-page":"107","DOI":"10.1007\/BF02252954","volume":"5","author":"J. C. Ebergen","year":"1991","unstructured":"Jo C. Ebergen. AF ormal Approach to Designing Delay-Insensitive Circuits. Distributed Computing, 5(3):107\u2013119, 1991. 2, 13, 14, 15","journal-title":"Distributed Computing"},{"issue":"3","key":"1_CR11","doi-asserted-by":"publisher","first-page":"223","DOI":"10.1016\/0167-6423(92)90017-6","volume":"18","author":"J. C. Ebergen","year":"1992","unstructured":"Jo C. Ebergen. Arbiters: an exercise in specifying and decomposing asynchronously communicating components. Science of Computer Programming, 18(3):223\u2013245, June 1992. 2","journal-title":"Science of Computer Programming"},{"key":"1_CR12","doi-asserted-by":"crossref","unstructured":"W. C. Mallon, J. T. Udding, and T. Verhoeff. Analysis and applications of the XDI model. In Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pages 231\u2013242, April 1999. 2, 7, 11, 18","DOI":"10.1109\/ASYNC.1999.761537"},{"key":"1_CR13","unstructured":"Willem Mallon. Personal communication, 1997. 17"},{"key":"1_CR14","unstructured":"Radu Negulescu. Process Spaces and Formal Verification of Asynchronous Circuits. PhD thesis, Dept. of Computer Science, Univ. of Waterloo, Canada, August 1998. 2"},{"key":"1_CR15","doi-asserted-by":"crossref","unstructured":"Radu Negulescu and Ad Peeters. Verification of speed-dependences in single-rail handshake circuits. In Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pages 159\u2013170, 1998. 2","DOI":"10.1109\/ASYNC.1998.666502"},{"issue":"6","key":"1_CR16","doi-asserted-by":"publisher","first-page":"720","DOI":"10.1145\/63526.63532","volume":"32","author":"I. E. Sutherland","year":"1989","unstructured":"Ivan E. Sutherland. Micropipelines. Communications of the ACM, 32(6):720\u2013738, January 1989. 2","journal-title":"Communications of the ACM"},{"key":"1_CR17","unstructured":"Alan Turing. Lecture to the London Mathematical Society on 20 February 1947. In Charles Babbage Institute Reprint Series for the History of Computing, Vol. 10, 1986. MIT Press, 1947. 2"},{"issue":"2","key":"1_CR18","first-page":"223","volume":"87","author":"C. H. Berkel Kees) van","year":"1999","unstructured":"C. H. (Kees) van Berkel, Mark B. Josephs, and Steven M. Nowick. Scanning the technology: Applications of asynchronous circuits. Proceedings of the IEEE, 87(2):223\u2013233, February 1999. 2","journal-title":"Scanning the technology: Applications of asynchronous circuits"},{"key":"1_CR19","doi-asserted-by":"crossref","DOI":"10.1007\/BFb0031414","volume-title":"Trace Theory and VLSI Design","author":"J. L. A. Snepscheut van de","year":"1985","unstructured":"Jan L. A. van de Snepscheut. Trace Theory and VLSI Design. Springer-Verlag, Heidelberg, 1985. 2"},{"key":"1_CR20","unstructured":"Tom Verhoeff. A Theory of Delay-Insensitive Systems. PhD thesis, Eindhoven University of Techology, 1994. 1, 2, 4, 7, 8, 9, 11, 13, 15, 18"},{"key":"1_CR21","doi-asserted-by":"crossref","unstructured":"Tom Verhoeff. Analyzing specifications for delay-insensitive circuits. In Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pages 172\u2013183, 1998.","DOI":"10.1109\/ASYNC.1998.666503"}],"container-title":["Lecture Notes in Computer Science","Concurrency and Hardware Design"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-36190-1_1","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,4,30]],"date-time":"2019-04-30T23:35:09Z","timestamp":1556667309000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-36190-1_1"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002]]},"ISBN":["9783540001997","9783540361909"],"references-count":21,"URL":"https:\/\/doi.org\/10.1007\/3-540-36190-1_1","relation":{},"ISSN":["0302-9743"],"issn-type":[{"type":"print","value":"0302-9743"}],"subject":[],"published":{"date-parts":[[2002]]}}}