{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,13]],"date-time":"2026-03-13T13:16:35Z","timestamp":1773407795095,"version":"3.50.1"},"publisher-location":"Berlin, Heidelberg","reference-count":27,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"value":"9783540001997","type":"print"},{"value":"9783540361909","type":"electronic"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2002]]},"DOI":"10.1007\/3-540-36190-1_3","type":"book-chapter","created":{"date-parts":[[2007,7,16]],"date-time":"2007-07-16T16:24:21Z","timestamp":1184603061000},"page":"61-107","source":"Crossref","is-referenced-by-count":6,"title":["GALA (Globally Asynchronous \u2014 Locally Arbitrary) Design"],"prefix":"10.1007","author":[{"given":"Victor","family":"Varshavsky","sequence":"first","affiliation":[]},{"given":"Vyacheslav","family":"Marakhovsky","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2002,11,27]]},"reference":[{"key":"3_CR1","doi-asserted-by":"crossref","unstructured":"V. I. Varshavsky, T.-A. Chu, \u201cSelf-Timing-Tools for Hardware Support of Parallel, Concurrent and Event-Driven Process Control,\u201d Proceedings of the Conference on Massively Parallel Computing Systems (MPCS), May 1994, pp. 510\u2013515.","DOI":"10.1109\/MPCS.1994.367043"},{"key":"3_CR2","doi-asserted-by":"crossref","unstructured":"V. I. Varshavsky, V. B. Marakhovsky, T.-A. Chu, \u201cLogical Timing (Global Synchronization of Asynchronous Arrays)\u201d, Parallel Algorithm\/Architecture Synthesis, International Symposium, Aizu-Wakamatsu, Japan, IEEE CS Press, March 1995, pp. 130\u2013138.","DOI":"10.1109\/AISPAS.1995.401346"},{"key":"3_CR3","unstructured":"V. Varshavsky, V. B. Marakhovsky, T.-A. Chu, \u201cAsynchronous Timing of Arrays with Synchronous Prototype\u201d, Proceedings of the Second International Conference on Massively Parallel Computing Systems (MPCS\u201996), Ischia, Italy, May 1996, pp. 47\u201354."},{"key":"3_CR4","doi-asserted-by":"crossref","unstructured":"V. I. Varshavsky, V. B. Marakhovsky, \u201cGlobal Synchronization of Asynchronous Arrays in Logical Time\u201d, Parallel Algorithm\/Architecture Synthesis, The Second International Symposium, Aizu-Wakamatsu, Japan, IEEE CS Press, March 1997, pp. 207\u2013215.","DOI":"10.1109\/AISPAS.1997.581663"},{"key":"3_CR5","unstructured":"C. D. Nielsen, Delay-Insensitive Design with Constant Response Time, Technical Report ID-TR: 1994-134, Technical University of Denmark, DK-2800 Lyngby, Denmark, Jan. 1994."},{"key":"3_CR6","unstructured":"M. Kishinevsky, A. Kondratyev, A. Taubin, and V. Varshavsky, Concurrent Hardware. The Theory and Practice of Self-Timed Design, J.Wiley & Sons, 1993."},{"key":"3_CR7","unstructured":"V. Varshavsky, Hardware Support of Parallel Asynchronous Processes, Helsinki University of Technology, Digital Systems Laboratory. Series A: Research Reports: No 2; Sept. 1987."},{"key":"3_CR8","doi-asserted-by":"crossref","unstructured":"V. Varshavsky, M. Kishinevsky, V. Marakhovsky et al., Self-timed Control of Concurrent Processes, Ed. by V. Varshavsky, Kluver Academic Publishers, 1990.","DOI":"10.1007\/978-94-009-0487-3"},{"key":"3_CR9","unstructured":"V. Varshavsky, M. Kishinevsky, V. Marakhovsky et al., \u201cAsynchronous Distributer,\u201d USSR Inventory Certificate No. 1064461, The Inventions Bulletin, No. 48, 1983."},{"key":"3_CR10","unstructured":"D. K\u00f6nig, Theorie der Endichen und Unendlichen Graphen, Leipzig, Akad. Verlag M. B. H., 1936, 258SS; N. Y., Chelsea, 1950. Zbl, 15, 375."},{"key":"3_CR11","unstructured":"V. Varshavsky, A. Kondratyev, V. Marakhovsky, \u201cCounting Device\u201d, USSR Patent Certificate No. 1594684, The Inventions Bulletin, 1990, No.35."},{"key":"3_CR12","unstructured":"T.-A. Chu, \u201c10 Gbps ATM LIMO\u201d, ACORN Networks Inc., http:\/\/www.acornnetworks.com\/index.html , 1997."},{"key":"3_CR13","doi-asserted-by":"crossref","unstructured":"S. B. Furber, and J. Liu, \u201cDynamic Logic in Four-Phase Micro-pipelines\u201d, Advanced Research in Asynchronous Circuits and Systems, Second International Symposium, Aizu-Wakamatsu, Japan, March 18-21, 1996, IEEE, pp.11\u201316.","DOI":"10.1109\/ASYNC.1996.494433"},{"key":"3_CR14","unstructured":"V. Varshavsky, A. Kondratyev, N. Kravchenko, and B. Tsyrlin, \u201cAsynchronous Distributor\u201d, USSR Patent Certificate No.1598142, The Inventions Bulletin, No.37, 1990."},{"key":"3_CR15","unstructured":"R. F. Sproull, I. E. Sutherland, C. E. Molnar, Counterflow Pipeline Processor Architecture, Technical Report SMLI TR-94-25, Sun Micro-systems Laboratories, Inc., CA 94043, April 1994."},{"issue":"3","key":"3_CR16","doi-asserted-by":"publisher","first-page":"48","DOI":"10.1109\/MDT.1994.303847","volume":"11","author":"R. F. Sproull","year":"1994","unstructured":"R. F. Sproull, I. E. Sutherland, and C. E. Molnar, \u201cThe Counterflow Pipeline Processor Architecture\u201d, IEEE Design and Test of Computers, 11(3), Fall 1994, pp.48\u201359.","journal-title":"IEEE Design and Test of Computers"},{"issue":"5","key":"3_CR17","doi-asserted-by":"publisher","first-page":"287","DOI":"10.1049\/ip-cdt:19960658","volume":"143","author":"W. H. F. J. Kurver","year":"1996","unstructured":"W. H. F. J. Kurver and I.M. Nedelchev, \u201cSynchronous Implementation of the SCPP-A Counterflow Pipeline Processor\u201d, IEE Proceedings, Computers and Digital Techniques, 143(5), Sept. 1996, pp.287\u2013294.","journal-title":"IEE Proceedings, Computers and Digital Techniques"},{"key":"3_CR18","doi-asserted-by":"crossref","unstructured":"B. Coates, J. Ebergen, J. Lexau, S. Fairbanks, I. Jones, A. Ridgway, D. Harris, and I. Sutherland, \u201cA Counterflow Pipeline Experiment\u201d, In proc. of International Symposium on Advanced Research in Asynchronous Circuits and Systems, April 1999, pp.161\u2013172.","DOI":"10.1109\/ASYNC.1999.761531"},{"key":"3_CR19","doi-asserted-by":"crossref","unstructured":"V. Varshavsky, \u201cAsynchronous Interaction in Massively Parallel Computing Systems\u201d, Proceedings of the IEEE First International Conference on Algorithms and Architectures for Parallel Processing, Australia, Brisbane, April 1995, Vol.2, pp.951\u2013953.","DOI":"10.1109\/ICAPP.1995.472302"},{"issue":"3","key":"3_CR20","doi-asserted-by":"publisher","first-page":"212","DOI":"10.1007\/BF01691105","volume":"4","author":"V. Varshavsky","year":"1970","unstructured":"V. Varshavsky, V. Marakhovsky and V. Peschansky, \u201cSynchronization of Interacting Automata\u201d, Mathematical System Theory, 1970, Vol. 4, No. 3, pp. 212\u2013230.","journal-title":"Mathematical System Theory"},{"key":"3_CR21","doi-asserted-by":"crossref","unstructured":"V. I. Varshavsky, V. B. Marakhovsky, \u201cOne-Two-One Track Asynchronous FIFO\u201d, Proceedings of the 1998 IEEE Asia-Pacific Conference on Circuits and Systems, (APCCAS-98), Chiagmai, Thailand, 1998, pp.743\u2013746.","DOI":"10.1109\/APCCAS.1998.743928"},{"key":"3_CR22","unstructured":"V. I. Varshavsky, V. B. Marakhovsky, \u201cAsynchronous Control Logic Design for Counterflow Pipeline Processor\u201d, Proceedings of the 9th International Symposium on Integrated Circuits and Systems (ISIC-2001), Singapore, 2001, pp.177\u2013181. 1998, pp.743-746."},{"key":"3_CR23","doi-asserted-by":"crossref","unstructured":"V. I. Varshavsky, V. B. Marakhovsky, and R. A. Lashevsky, \u201cAsynchronous Interaction in Massively Parallel Computing Systems\u201d, Proceedings of the IEEE First International Conference on Algorithms and Architectures for Parallel Processing, Australia, Brisbane, 1995, Vol.2, pp. 481\u2013492.","DOI":"10.1109\/ICAPP.1995.472230"},{"key":"3_CR24","doi-asserted-by":"crossref","unstructured":"V. I. Varshavsky, V. B. Marakhovsky, M. Tsukisaka, \u201cData-Controlled Delays in the Asynchronous Design\u201d, IEEE International Symposium on Circuits and Systems, ISCAS\u201996, Atlanta, USA, 1996, Vol. 4, pp. 153\u2013155.","DOI":"10.1109\/ISCAS.1996.541922"},{"key":"3_CR25","unstructured":"V. I. Varshavsky, \u201cDoes Current Sensor Make Sense?\u201d Proceedings of the 7th International Symposium on IC Technology, Systems & Applications (ISIC-97), Singapore, 1997, pp. 471\u2013473."},{"key":"3_CR26","doi-asserted-by":"crossref","unstructured":"V. I. Varshavsky, M. Tsukisaka, \u201cCurrent Sensor on the Base of Permanent Prechargable Amplifier\u201d, The 9th Great Lake Symposium on VLSI, Ann Arbor, USA, 1999, pp. 210\u2013213.","DOI":"10.1109\/GLSV.1999.757412"},{"key":"3_CR27","unstructured":"V. I. Varshavsky, V. B. Marakhovsky, M. Tsukisaka, A. Kato, \u201cCurrent Sensor-Transient Process Problems\u201d, Proceedings of the 8th International Symposium on Integrated Circuits, Devices & Systems (ISIC-99), Singapore, 1999, pp. 163\u2013166."}],"container-title":["Lecture Notes in Computer Science","Concurrency and Hardware Design"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-36190-1_3","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,19]],"date-time":"2025-01-19T11:58:04Z","timestamp":1737287884000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-36190-1_3"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002]]},"ISBN":["9783540001997","9783540361909"],"references-count":27,"URL":"https:\/\/doi.org\/10.1007\/3-540-36190-1_3","relation":{},"ISSN":["0302-9743"],"issn-type":[{"value":"0302-9743","type":"print"}],"subject":[],"published":{"date-parts":[[2002]]}}}