{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,26]],"date-time":"2025-03-26T21:06:50Z","timestamp":1743023210088,"version":"3.40.3"},"publisher-location":"Berlin, Heidelberg","reference-count":15,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540002628"},{"type":"electronic","value":"9783540362289"}],"license":[{"start":{"date-parts":[[2002,1,1]],"date-time":"2002-01-01T00:00:00Z","timestamp":1009843200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[2002,1,1]],"date-time":"2002-01-01T00:00:00Z","timestamp":1009843200000},"content-version":"vor","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2002]]},"DOI":"10.1007\/3-540-36228-2_134","type":"book-chapter","created":{"date-parts":[[2007,8,29]],"date-time":"2007-08-29T03:31:35Z","timestamp":1188358295000},"page":"1080-1087","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":3,"title":["Using Intel Streaming SIMD Extensions for 3D Geometry Processing"],"prefix":"10.1007","author":[{"given":"Wan-Chun","family":"Ma","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chia-Lin","family":"Yang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2002,12,16]]},"reference":[{"key":"134_CR1","unstructured":"Intel Pentium 4 and Intel Xeon processor optimization reference manual. Intel Corporation, order number: 248966-04"},{"key":"134_CR2","unstructured":"Streaming SIMD Extensions -3D transform. Intel Corporation, order number: 243631-004, 1999."},{"key":"134_CR3","unstructured":"The IA-32 Intel architecture software developer\u2019s manual. Intel Corporation, order number: 245471, 1:231\u2013246, 2001."},{"key":"134_CR4","unstructured":"The IA-32 Intel architecture software developer\u2019s manual. Intel Corporation, order number: 245471, 1: 247\u2013268, 2001."},{"key":"134_CR5","unstructured":"Intel VTune performance analyzer. Intel Corporation\n http:\/\/developer.Intel.com\/software\/products\/vtune\/vtune60\/index.htm."},{"key":"134_CR6","unstructured":"Numega TrueTime,devpartner for visual C++. Compuware Corporation, http:\/\/www.compuware.com\/products\/devpartner\/visualc\/truetimevc.htm."},{"key":"134_CR7","unstructured":"M.P. et al. Altivec technology: Accelerating media processing across the spectrum. HotChips10, 1998."},{"issue":"4","key":"134_CR8","doi-asserted-by":"publisher","first-page":"10","DOI":"10.1109\/40.526921","volume":"16","author":"M.T.","year":"1996","unstructured":"M.T. et al. VIS speeds new media processing. IEEE Micro, 16(4):10\u201320, 1996.","journal-title":"IEEE Micro"},{"key":"134_CR9","unstructured":"et al. Evaluating MMX technology using DSP and multimedia applications. ACM\/IEEE International Symposium on Microarchitecture, 1998."},{"issue":"4","key":"134_CR10","first-page":"42","volume":"16","author":"A. Peleg","year":"1996","unstructured":"A. Peleg and U. Weiser. MMX technology extension to the Intel architecture. IEEE Mirco, 16(4):42\u201350, 1996.","journal-title":"IEEE Mirco"},{"issue":"4","key":"134_CR11","doi-asserted-by":"publisher","first-page":"47","DOI":"10.1109\/40.865866","volume":"20","author":"S.K. Raman","year":"2000","unstructured":"S.K. Raman, V. Pentkovski, and J. Keshava. Implementing Streaming SIMD Extensions on the Pentium III processor. IEEE Micro, 20(4):47\u201357,2000.","journal-title":"IEEE Micro"},{"key":"134_CR12","doi-asserted-by":"crossref","unstructured":"P. Ranganathan, S. Adve, and N.P. Jouppi. Performance of image and video processing with general-purpose processors and media ISA extensions. International Symposium on Computer Architecture, 1999.","DOI":"10.1145\/307338.300990"},{"key":"134_CR13","unstructured":"D.S. Rice. High-performance image processing using special-purpose CPU instruction set. Master\u2019s thesis, Stanford University, 1996."},{"key":"134_CR14","unstructured":"J.D. Foley, A.V. Dam, and S.K. Feiner. Introduction to Computer Graphics Addison Wesley, 1993."},{"key":"134_CR15","unstructured":"C.-L. Yang, B. Sano, and A.R. Lebeck. Exploiting instruction level parallelism in geometry processing for three dimensional graphics applications. ACM\/IEEE International Symposium on Microarchitecture, 1998."}],"container-title":["Lecture Notes in Computer Science","Advances in Multimedia Information Processing \u2014 PCM 2002"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-36228-2_134","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,1,8]],"date-time":"2021-01-08T04:59:44Z","timestamp":1610081984000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-36228-2_134"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002]]},"ISBN":["9783540002628","9783540362289"],"references-count":15,"URL":"https:\/\/doi.org\/10.1007\/3-540-36228-2_134","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2002]]},"assertion":[{"value":"16 December 2002","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}}]}}