{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,1,23]],"date-time":"2025-01-23T00:40:33Z","timestamp":1737592833212,"version":"3.33.0"},"publisher-location":"Berlin, Heidelberg","reference-count":17,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540412199"},{"type":"electronic","value":"9783540409229"}],"license":[{"start":{"date-parts":[[2002,1,1]],"date-time":"2002-01-01T00:00:00Z","timestamp":1009843200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2002]]},"DOI":"10.1007\/3-540-40922-x_29","type":"book-chapter","created":{"date-parts":[[2007,11,29]],"date-time":"2007-11-29T09:41:36Z","timestamp":1196329296000},"page":"507-522","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":5,"title":["Symbolic Simulation with Approximate Values"],"prefix":"10.1007","author":[{"given":"Chris","family":"Wilson","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"David L.","family":"Dill","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Randal E.","family":"Bryant","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2002,6,18]]},"reference":[{"key":"29_CR1","doi-asserted-by":"crossref","unstructured":"V. Bertacco, M. Damiani, and S. Quer. Cycle-based symbolic simulation of gatelevel synchronous circuits. In Proc. of 36th Design Automation Conf., pages 391\u2013396, 1999.","DOI":"10.1145\/309847.309966"},{"key":"29_CR2","doi-asserted-by":"crossref","unstructured":"A. Biere, A. Cimatti, E. M. Clarke, M. Fujita, and Y. Zhu. Symbolic model checking using sat procedures instead of bdds. In Proc. of 36th Design Automation Conf., pages 317\u2013320, 1999.","DOI":"10.1145\/309847.309942"},{"issue":"3","key":"29_CR3","doi-asserted-by":"publisher","first-page":"293","DOI":"10.1145\/136035.136043","volume":"24","author":"R. E. Bryant","year":"1992","unstructured":"R. E. Bryant. Symbolic boolean manipulation with ordered binary decision diagrams. ACM Computing Surveys, 24(3):293\u2013318, September 1992.","journal-title":"ACM Computing Surveys"},{"issue":"12","key":"29_CR4","doi-asserted-by":"publisher","first-page":"1465","DOI":"10.1109\/43.552080","volume":"15","author":"H. Cho","year":"1996","unstructured":"H. Cho, G. Hachtel, E. Macii, B. Pleisser, and F. Somenzi. Algorithms for approximate fsm traversal based on state space decomposition. IEEE Trans. on Comp.-Aided Design of Integrated Circuits and Systems, 15(12):1465\u20131478, December 1996.","journal-title":"IEEE Trans. on Comp.-Aided Design of Integrated Circuits and Systems"},{"key":"29_CR5","unstructured":"M. Dalal. Efficient propositional constraint propagation. In Proc. of the Tenth National Conf. on Artificial Intelligence (AAAI-92), pages 409\u2013414, 1992."},{"issue":"7","key":"29_CR6","doi-asserted-by":"publisher","first-page":"394","DOI":"10.1145\/368273.368557","volume":"5","author":"M. Davis","year":"1962","unstructured":"M. Davis, G. Logemann, and D. Loveland. Machine program for theorem-proving. Communications of the ACM, 5(7):394\u2013397, 1962.","journal-title":"Communications of the ACM"},{"key":"29_CR7","doi-asserted-by":"crossref","unstructured":"M. Ganai, A. Aziz, and A. Kuehlman. Augmenting simulation with symbolic algorithms. In Proc. of 36th Design Automation Conf., pages 385\u2013390, 1999.","DOI":"10.1145\/309847.309965"},{"key":"29_CR8","doi-asserted-by":"crossref","unstructured":"S. Govindaraju, D. L. Dill, A. J. Hu, and M. A. Horowitz. Approximate reachability with bdds using overlapping projections. In Proceedings of the 35th Design Automation Conference, June 1998. San Francisco, CA.","DOI":"10.1145\/277044.277169"},{"key":"29_CR9","doi-asserted-by":"crossref","unstructured":"R. Ho and M. Horowitz. Validation coverage analysis for complex digital designs. In 1996 IEEE International Conference on Computer-Aided Design, pages 146\u2013151, 1996.","DOI":"10.1109\/ICCAD.1996.569537"},{"issue":"8","key":"29_CR10","doi-asserted-by":"publisher","first-page":"1005","DOI":"10.1109\/43.298036","volume":"13","author":"P. Jain","year":"1994","unstructured":"P. Jain and G. Gopalakrishnan. Efficient symbolic simulation based verification using the paramteric form of boolean expressions. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 13(8):1005\u20131015, 1994.","journal-title":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"},{"key":"29_CR11","doi-asserted-by":"crossref","unstructured":"R. Jones, M. Aagard, and C.-J. Seger. Formal verification using parametric representations of boolean constraints. In Proc. of 36th Design Automation Conf., pages 402\u2013407, 1999.","DOI":"10.1145\/309847.309968"},{"key":"29_CR12","unstructured":"D. E. Long. Cmu bdd package, 1993."},{"issue":"1","key":"29_CR13","doi-asserted-by":"publisher","first-page":"2","DOI":"10.1109\/12.656068","volume":"47","author":"D. Moundanos","year":"1998","unstructured":"D. Moundanos, J. A. Abraham, and Y. V. Hoskote. Abstraction techniques for validation coverage analysis and test generation. IEEE Transactions on Computers, 47(1):2\u201314, January 1998.","journal-title":"IEEE Transactions on Computers"},{"key":"29_CR14","doi-asserted-by":"crossref","unstructured":"K. Ravi, K. McMillan, T. Shiple, and F. Somenzi. Approximation and decomposition of binary decision diagrams. In Proc. of 35th Design Automation Conf., pages 445\u2013450, 1998.","DOI":"10.1145\/277044.277168"},{"issue":"2","key":"29_CR15","doi-asserted-by":"publisher","first-page":"147","DOI":"10.1007\/BF01383966","volume":"6","author":"C.-J. Seger","year":"1995","unstructured":"C.-J. Seger and R. E. Bryant. Formal verification by symbolic evaluation of partially-ordered trajectories. Formal Methods in System Design, 6(2):147\u2013189, 1995.","journal-title":"Formal Methods in System Design"},{"key":"29_CR16","doi-asserted-by":"crossref","unstructured":"W.-D. Weber et al. The mercury interconnect architecture: A cost-effective infrastructure for high-performance servers. In Proc. of the 24th Annual Intl. Symp. on Computer Architecture (ISCA97), 1997.","DOI":"10.1145\/264107.264149"},{"key":"29_CR17","doi-asserted-by":"crossref","unstructured":"C. Wilson and D. L. Dill. Reliable verification using symbolic simulation with scalar values. In Proceedings of the 37th Design Automation Conference, June 2000. Los Angeles, CA.","DOI":"10.1145\/337292.337336"}],"container-title":["Lecture Notes in Computer Science","Formal Methods in Computer-Aided Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-40922-X_29","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,23]],"date-time":"2025-01-23T00:23:27Z","timestamp":1737591807000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-40922-X_29"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002]]},"ISBN":["9783540412199","9783540409229"],"references-count":17,"URL":"https:\/\/doi.org\/10.1007\/3-540-40922-x_29","relation":{},"ISSN":["0302-9743"],"issn-type":[{"type":"print","value":"0302-9743"}],"subject":[],"published":{"date-parts":[[2002]]},"assertion":[{"value":"18 June 2002","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}}]}}