{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T12:01:46Z","timestamp":1759147306265},"publisher-location":"Berlin, Heidelberg","reference-count":9,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540678991"},{"type":"electronic","value":"9783540446149"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2000]]},"DOI":"10.1007\/3-540-44614-1_45","type":"book-chapter","created":{"date-parts":[[2007,10,20]],"date-time":"2007-10-20T17:25:22Z","timestamp":1192901122000},"page":"422-431","source":"Crossref","is-referenced-by-count":1,"title":["A Comparison of FPGA Implementations of Bit-Level and Word-Level Matrix Multipliers"],"prefix":"10.1007","author":[{"given":"Radhika S.","family":"Grover","sequence":"first","affiliation":[]},{"given":"Weijia","family":"Shang","sequence":"additional","affiliation":[]},{"given":"Qiang","family":"Li","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2002,4,12]]},"reference":[{"key":"45_CR1","first-page":"596","volume-title":"Proc. 11th Int\u2019l Conf. on Systems Engineering","author":"C. W. Li","year":"1996","unstructured":"C. W. Li and B. W. Wah, \u201cOptimal Bit-Level Processor Arrays for Matrix Multiplication,\u201d Proc. 11th Int\u2019l Conf. on Systems Engineering, Univ. of Nevada, NV, July 1996, pp. 596\u2013601."},{"key":"45_CR2","first-page":"30","volume":"I","author":"W. Shang","year":"1993","unstructured":"W. Shang, B. W. Wah, \u201cDependence Analysis and Architecture Design for Bit-Level Algorithms\u201d, Intl. Conf. On Parallel Process., vol. I, pp30\u201338, 1993.","journal-title":"Intl. Conf. On Parallel Process"},{"unstructured":"R. S. Grover, W. Shang, Q. Li, \u201cAn Improved architecture for bit-level matrix multiplication\u201d, To be published in Conf. Proc. PDPTA \u20182000, Las Vegas, USA, June 26\u201329, 2000.","key":"45_CR3"},{"unstructured":"R. S. Grover, W. Shang, Q. Li, Technical Report number: coen00-01, Department of Computer Engineering, Santa Clara University, Santa Clara, CA 95053, May 2000.","key":"45_CR4"},{"doi-asserted-by":"crossref","unstructured":"Z. Yang, W. Shang and J. A. B. Fortes, \u201cConflict-Free Scheduling of Nested Loop Algorithms on Lower Dimensional Processor Arrays\u201d, Proc. 6th IEEE Int\u2019l Parallel Processing Symposium, March 1992, Beverly Hills, CA, pp. 156\u2013164.","key":"45_CR5","DOI":"10.1109\/IPPS.1992.223054"},{"issue":"3","key":"45_CR6","doi-asserted-by":"publisher","first-page":"350","DOI":"10.1109\/71.139208","volume":"3","author":"W. Shang","year":"1992","unstructured":"W. Shang and J. A. B. Fortes, \u201cOn Mapping of Uniform Dependence Algorithms into. Lower Dimensional Processor Arrays,\u201d IEEE Trans. on Parallel and Distributed Systems, Vol. 3, No. 3, May 1992, pp. 350\u2013363.","journal-title":"IEEE Trans. on Parallel and Distributed Systems"},{"unstructured":"John L. Hennessy and David A. Patterson. Computer Architecture: A Quantitative Approach. Morgan Kaufmann Publishers, Inc., 1990.","key":"45_CR7"},{"unstructured":"XC4000E and XC4000X FPGA Series \u2014 Description v 1.6. Xilinx Data Book, 1999","key":"45_CR8"},{"unstructured":"CORE Generator & IP Modules \u2014 Documentation & Data Sheets, Xilinx, 1999","key":"45_CR9"}],"container-title":["Lecture Notes in Computer Science","Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-44614-1_45","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,2,24]],"date-time":"2019-02-24T08:52:49Z","timestamp":1550998369000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-44614-1_45"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2000]]},"ISBN":["9783540678991","9783540446149"],"references-count":9,"URL":"https:\/\/doi.org\/10.1007\/3-540-44614-1_45","relation":{},"ISSN":["0302-9743"],"issn-type":[{"type":"print","value":"0302-9743"}],"subject":[],"published":{"date-parts":[[2000]]}}}