{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T23:37:25Z","timestamp":1725493045119},"publisher-location":"Berlin, Heidelberg","reference-count":8,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540678991"},{"type":"electronic","value":"9783540446149"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2000]]},"DOI":"10.1007\/3-540-44614-1_96","type":"book-chapter","created":{"date-parts":[[2007,10,20]],"date-time":"2007-10-20T17:25:22Z","timestamp":1192901122000},"page":"830-833","source":"Crossref","is-referenced-by-count":0,"title":["FPL Curriculum at Tallinn Technical University"],"prefix":"10.1007","author":[{"given":"K.","family":"Tammem\u00e4e","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"T.","family":"Evartson","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2002,4,12]]},"reference":[{"key":"96_CR1","doi-asserted-by":"crossref","unstructured":"J. Becker, F.M. Renner M Glesner, \u201cPerspectives of Reconfigurable Computing in Education\u201d, In Microelectronics Education, Kluwer Academic Publishers, 1998.","DOI":"10.1007\/978-94-011-5110-8_68"},{"key":"96_CR2","doi-asserted-by":"crossref","unstructured":"Juri P\u00f6ldre, Kalle Tammem\u00e4e, \u201cRecon.gurable Multiplier for Virtex FPGA Family\u201d, FPL\u201999, Glasgow, 1999, pp. 369\u2013464.","DOI":"10.1007\/978-3-540-48302-1_38"},{"key":"96_CR3","unstructured":"Juri P\u00f6ldre, Ahto Buldas, \u201cA VLSI Implementation of RSA and IDEA encryption engine\u201d, NORCHIP\u201997, 1997"},{"key":"96_CR4","unstructured":"http:\/\/www.xess.com"},{"key":"96_CR5","unstructured":"http:\/\/www.vcc.com"},{"key":"96_CR6","doi-asserted-by":"crossref","unstructured":"Stuart Nisbet, Steven A. Guccione, \u201cThe XC6200DS Development System\u201d, FPL\u201997, London, 1997.","DOI":"10.1007\/3-540-63465-7_211"},{"key":"96_CR7","doi-asserted-by":"crossref","unstructured":"Reiner W. Hartenstein, Michael Herz, Frank Gilbert, \u201cDesigning for Xilinx XC6200 FPGAs\u201d, FPL\u201998, Tallinn, 1998.","DOI":"10.1007\/BFb0055230"},{"key":"96_CR8","unstructured":"T. Vassileva and V. Tchoumatchenko,\u201cFPGA as Educational ASIC\u201d, In Proceedings of the European Workshop Microelectronics Education, Grenoble, France, 1996."}],"container-title":["Lecture Notes in Computer Science","Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-44614-1_96","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,5,14]],"date-time":"2023-05-14T13:05:45Z","timestamp":1684069545000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-44614-1_96"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2000]]},"ISBN":["9783540678991","9783540446149"],"references-count":8,"URL":"https:\/\/doi.org\/10.1007\/3-540-44614-1_96","relation":{},"ISSN":["0302-9743"],"issn-type":[{"type":"print","value":"0302-9743"}],"subject":[],"published":{"date-parts":[[2000]]}}}