{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,27]],"date-time":"2025-10-27T15:55:06Z","timestamp":1761580506621},"publisher-location":"Berlin, Heidelberg","reference-count":18,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540424994"},{"type":"electronic","value":"9783540446873"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2001]]},"DOI":"10.1007\/3-540-44687-7_31","type":"book-chapter","created":{"date-parts":[[2007,5,26]],"date-time":"2007-05-26T20:46:00Z","timestamp":1180212360000},"page":"296-305","source":"Crossref","is-referenced-by-count":11,"title":["CRISP: A Template for Reconfigurable Instruction Set Processors"],"prefix":"10.1007","author":[{"given":"Pieter Op","family":"de Beeck","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Francisco","family":"Barat","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Murali","family":"Jayapala","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rudy","family":"Lauwereins","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2001,8,17]]},"reference":[{"key":"31_CR1","doi-asserted-by":"crossref","unstructured":"Catthoor F., et al, Custom Memory Management Methodology, Kluwer Academic Publishers (1998)","DOI":"10.1007\/978-1-4757-2849-1"},{"key":"31_CR2","unstructured":"Overview of the MPEG-4 Standard, International Organization for Standardization, ISO\/IEC JTC1\/SC29\/WG11 N4030 (march 2001)"},{"issue":"2","key":"31_CR3","doi-asserted-by":"crossref","first-page":"40","DOI":"10.1109\/54.844333","volume":"17","author":"M.F. Jacome","year":"2000","unstructured":"Jacome M. F., deVeciana G., Design Challenges for New Application-Specific Processors, IEEE Design & Test of Computers (2000) 40\u201350","journal-title":"IEEE Design & Test of Computers"},{"key":"31_CR4","doi-asserted-by":"crossref","unstructured":"Seals R. C, Whapshott G. F., Programmable Logic: PLDs and FPGAs, Macmillan Press Ltd (1997)","DOI":"10.1007\/978-1-349-14003-9"},{"key":"31_CR5","unstructured":"Wittig R., Chow P., OneChip: An FPGA Processor With Reconfigurable Logic, Proc. IEEE Symp.FCCM (1996) 145\u2013154"},{"key":"31_CR6","unstructured":"Barat F., Lauwereins, R., Reconfigurable Instruction Set Processors: A Survey, IEEE Workshop in Rapid System Prototyping (2000) 168\u2013173"},{"key":"31_CR7","unstructured":"MIPS32 4Kp TM Processor Core Datasheet, MIPS Technologies Inc. (June 2000)"},{"key":"31_CR8","unstructured":"TMS320C6000 CPU and Instruction Set Reference Guide, SPRU189F, Texas Instruments, (October 2000)"},{"key":"31_CR9","unstructured":"ARM7TDMI Technical Reference Manual, Rev 3, ARM (2000)"},{"key":"31_CR10","unstructured":"Kievits P., Lambers E., Moerman C, Woudsma R., R.E.A.L. DSP Technology for Telecom Baseband Processing, ICSPAT (1998)"},{"key":"31_CR11","unstructured":"Hauck S., Fry T.W., Hosler M.M., and. Kao, J.P., The Chimaera Reconfigurable Functional Unit, IEEE Symposium on FPGAs for Custom Computing Machines (1997)"},{"key":"31_CR12","unstructured":"Miyamori T., Olukotun K., REMARC: Reconfigurable Multimedia Array Coprocessor, FPGA\u201998 (1998)"},{"key":"31_CR13","doi-asserted-by":"crossref","unstructured":"Jacob J. A., Chow P., Memory interfacing and instruction specification for reconfigurable processors, Proceedings of the 1999 ACM\/SIGDA seventh international symposium on Field programmable gate arrays (1999) 145\u2013154","DOI":"10.1145\/296399.296446"},{"key":"31_CR14","unstructured":"Kathail V., Schlansker M. S., Rau, B. R, HPL-PD-Architecture Specification, Version 1.1, Hewlett-Packard Labs Technical Report HPL-98-128 (February 2000)"},{"key":"31_CR15","unstructured":"Technical Summary of the ARC Core, http:\/\/www.arccores.com (2001)"},{"key":"31_CR16","unstructured":"Klaiber A., The Technology Behind Crusoe Processors, Transmeta Corporation (January2000)"},{"key":"31_CR17","unstructured":"TM1000 Data Book, Philips Electronics North America Corporation (1997)"},{"key":"31_CR18","doi-asserted-by":"crossref","unstructured":"Benini L., et al, Selective Instruction Compression for Memory Energy Reduction in Embedded Systems, ISLPED\u2019 99 (1999) 206\u2013211","DOI":"10.1145\/313817.313927"}],"container-title":["Lecture Notes in Computer Science","Field-Programmable Logic and Applications"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-44687-7_31","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,4,28]],"date-time":"2019-04-28T07:04:46Z","timestamp":1556435086000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-44687-7_31"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2001]]},"ISBN":["9783540424994","9783540446873"],"references-count":18,"URL":"https:\/\/doi.org\/10.1007\/3-540-44687-7_31","relation":{},"ISSN":["0302-9743"],"issn-type":[{"type":"print","value":"0302-9743"}],"subject":[],"published":{"date-parts":[[2001]]}}}