{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,1,17]],"date-time":"2025-01-17T05:20:31Z","timestamp":1737091231413,"version":"3.33.0"},"publisher-location":"Berlin, Heidelberg","reference-count":13,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540424994"},{"type":"electronic","value":"9783540446873"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2001]]},"DOI":"10.1007\/3-540-44687-7_35","type":"book-chapter","created":{"date-parts":[[2007,5,27]],"date-time":"2007-05-27T00:46:00Z","timestamp":1180226760000},"page":"336-345","source":"Crossref","is-referenced-by-count":1,"title":["Bubble Partitioning for LUT-Based Sequential Circuits"],"prefix":"10.1007","author":[{"given":"Frank","family":"Wolz","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Reiner","family":"Kolla","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2001,8,17]]},"reference":[{"key":"35_CR1","doi-asserted-by":"crossref","unstructured":"C. J. Alpert and S. Z. Yao: Spectral Partitioning: The More Eigenvectors, the Better, Proceedings of the 32nd Design Automation Conference, pp. 195\u2013200, 1995","DOI":"10.1145\/217474.217529"},{"key":"35_CR2","series-title":"Lect Notes Comput Sci","doi-asserted-by":"crossref","first-page":"213","DOI":"10.1007\/3-540-63465-7_226","volume-title":"7th Int\u2019l Workshop for Field-Programmable Logic and Applications","author":"V. Betz","year":"1997","unstructured":"Vaughn Betz and Jonathan Rose: VPR: A New Packing, Placement and Routing Tool for FPGA Research, 7th Int\u2019l Workshop for Field-Programmable Logic and Applications, LNCS 1304, pp. 213\u2013222, 1997"},{"key":"35_CR3","doi-asserted-by":"crossref","unstructured":"C. M. Fiduccia and R. M. Mattheyses: A linear time heuristic for improving network partitions, Proc. of the 19th Design Automation Conference, pp. 175\u2013181, 1982","DOI":"10.1109\/DAC.1982.1585498"},{"key":"35_CR4","first-page":"209","volume-title":"Computers and Intractability: A Guide to NP-Completeness","author":"M. R. Garey","year":"1979","unstructured":"Michael R. Garey, David S. Johnson: Computers and Intractability: A Guide to NP-Completeness, Freeman, New York, p. 209, 1979"},{"key":"35_CR5","doi-asserted-by":"crossref","unstructured":"Helena Krupnova, Ali Abbara, Gabriele Saucier: A Hierarchy-Driven FPGA Partitioning Method, Proceedings of the 34th Design Automation Conference, pp. 522\u2013525, 1997","DOI":"10.1109\/DAC.1997.597202"},{"issue":"4598","key":"35_CR6","doi-asserted-by":"publisher","first-page":"671","DOI":"10.1126\/science.220.4598.671","volume":"220","author":"S. Kirkpatrick","year":"1983","unstructured":"S. Kirkpatrick, C. D. Gelatt Jr. and M. P. Vecchi: Optimization by simulated annealing, Science, 220(4598), pp. 671\u2013680, 1983","journal-title":"Science"},{"issue":"2","key":"35_CR7","doi-asserted-by":"crossref","first-page":"291","DOI":"10.1002\/j.1538-7305.1970.tb01770.x","volume":"49","author":"B. W. Kernighan","year":"1970","unstructured":"B. W. Kernighan and S. Lin: An efficient heuristic procedure for partitioning graphs, Bell Systems Technical Journal, pp. 291\u2013307, Vol. 49, No. 2, 1970","journal-title":"Bell Systems Technical Journal"},{"key":"35_CR8","doi-asserted-by":"crossref","unstructured":"Huiqun Liu, Kai Zhu, D.F. Wong: Circuit Partitioning with Complex Resource Constraints in FPGAs, International Symposium on Field-Programmable Gate Arrays, pp. 77\u201384, 1998","DOI":"10.1145\/275107.275122"},{"key":"35_CR9","doi-asserted-by":"crossref","unstructured":"Alexander (Sandy) Marquardt, Vaughn Betz and Jonathan Rose: Using Cluster-Based Logic Blocks and Timing-Driven Packing to Improve FPGA Speed and Density, International Symposium on Field-Programmable Gate Arrays, pp. 37\u201346, 1999","DOI":"10.1145\/296399.296426"},{"key":"35_CR10","volume-title":"Technical Report","author":"D. W. Matula","year":"1986","unstructured":"D. W. Matula and F. Shahrokhi: Graph partitioning by sparse cuts and maximum concurrent flow, Technical Report, Southern Methodist University, Dallas, TX, 1986"},{"key":"35_CR11","unstructured":"Ellen M. Sentovich, Kanwar Jit Singh, et al.: SIS: A System for Sequential Circuit Synthesis, http:\/\/www-cad.eecs.berkeley.edu\/ , 1992"},{"key":"35_CR12","doi-asserted-by":"crossref","unstructured":"Yen-Chuen Wei and Chung-Kuan Cheng: Towards Efficient Hierarchical Designs by Ratio Cut Partitioning, Proceedings of the International Conference on Computer-Aided Design, pp. 298\u2013301, 1989","DOI":"10.1109\/ICCAD.1989.76957"},{"key":"35_CR13","doi-asserted-by":"crossref","unstructured":"Yen-Chuen Wei and Chung-Kuan Cheng: A General Purpose Multiple Way Partitioning Algorithm, Proceedings of the 28th Design Automation Conference, pp. 421\u2013426, 1991","DOI":"10.1145\/127601.127706"}],"container-title":["Lecture Notes in Computer Science","Field-Programmable Logic and Applications"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-44687-7_35","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,16]],"date-time":"2025-01-16T18:26:37Z","timestamp":1737051997000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-44687-7_35"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2001]]},"ISBN":["9783540424994","9783540446873"],"references-count":13,"URL":"https:\/\/doi.org\/10.1007\/3-540-44687-7_35","relation":{},"ISSN":["0302-9743"],"issn-type":[{"type":"print","value":"0302-9743"}],"subject":[],"published":{"date-parts":[[2001]]}}}