{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T22:43:26Z","timestamp":1725489806153},"publisher-location":"Berlin, Heidelberg","reference-count":25,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540678588"},{"type":"electronic","value":"9783540449058"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2000]]},"DOI":"10.1007\/3-540-44905-1_23","type":"book-chapter","created":{"date-parts":[[2007,8,16]],"date-time":"2007-08-16T07:04:03Z","timestamp":1187247843000},"page":"365-379","source":"Crossref","is-referenced-by-count":18,"title":["Compile-Time Based Performance Prediction"],"prefix":"10.1007","author":[{"given":"Calin","family":"Cascaval","sequence":"first","affiliation":[]},{"given":"Luiz","family":"DeRose","sequence":"additional","affiliation":[]},{"given":"David A.","family":"Padua","sequence":"additional","affiliation":[]},{"given":"Daniel A.","family":"Reed","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2001,6,12]]},"reference":[{"key":"23_CR1","doi-asserted-by":"crossref","unstructured":"T. Ball and J. R. Larus. Branch prediction for free. In Proceedings of the ACM SIGPLAN Conference on Programming Languages Design and Implementation\u2019 93, pages 300\u2013313, 1993.","DOI":"10.1145\/155090.155119"},{"key":"23_CR2","unstructured":"U. Banerjee. Dependence analysis. Kluwer Academic Publishers, 1997."},{"key":"23_CR3","doi-asserted-by":"crossref","unstructured":"W. Blume, R. Doallo, R. Eigenmann, J. Grout, J. Hoeflinger, T. Lawrence, J. Lee, D. Padua, Y. Paek, W. Pottenger, L. Rauchwerger, and P. Tu. Parallel Programming with Polaris. IEEE Computer, December 1996.","DOI":"10.1109\/2.546612"},{"key":"23_CR4","unstructured":"R. Bramley, D. Gannon, T. Stuckey, J. Villacis, J. Balasubramanian, E. Akman, F. Breg, S. Diwan, and M. Govindaraju. The Linear System Analyzer, chapter PSEs. IEEE, 1998."},{"key":"23_CR5","unstructured":"C. Cascaval and D. A. Padua. Compile-time cache misses estimation using stack distances. In preparation."},{"issue":"12","key":"23_CR6","doi-asserted-by":"crossref","first-page":"1301","DOI":"10.1002\/spe.4380211204","volume":"21","author":"P. P. Chang","year":"1991","unstructured":"P. P. Chang, S. A. Mahlke, and W.-M. W. Hwu. Using profile information to assist classic compiler code optimizations. Software Practice and Experience, 21(12):1301\u20131321, December 1991.","journal-title":"Software Practice and Experience"},{"key":"23_CR7","doi-asserted-by":"crossref","unstructured":"R. P. Colwell, R. P. Nix, J. J. O\u2019Donnell, D. B. Papworth, and P. K. Rodman. A VLIW architecture for a trace scheduling compiler. In Proceedings of ASPLOS II, pages 180\u2013192, Palo Alto, CA, October 1987.","DOI":"10.1145\/36177.36201"},{"key":"23_CR8","doi-asserted-by":"crossref","unstructured":"L. DeRose, Y. Zhang, and D. A. Reed. SvPablo: A multi-language performance analysis system. In 10th International Conference on Computer Performance Evaluation-Modelling Techniques and Tools-Performance Tools\u201998, pages 352\u2013355, Palma de Mallorca, Spain, September 1998.","DOI":"10.1007\/3-540-68061-6_31"},{"key":"23_CR9","doi-asserted-by":"crossref","unstructured":"T. Fahringer. Evaluation of benchmark performance estimation for parallel Fortran programs on massively parallel SIMD and MIMD computers. In IEEE Proceedings of the 2nd Euromicro Workshop on Parallel and Distributed Processing, Malaga, Spain, January 1994.","DOI":"10.1109\/EMPDP.1994.592525"},{"key":"23_CR10","doi-asserted-by":"crossref","unstructured":"T. Fahringer. Automatic Performance Prediction of Parallel Programs. Kluwer Academic Press, 1996.","DOI":"10.1007\/978-1-4613-1371-7"},{"key":"23_CR11","series-title":"Technical Report TR 97-9","volume-title":"Institute for Software Technology and Parallel Systems","author":"T. Fahringer","year":"1997","unstructured":"T. Fahringer. Estimating cache performance for sequential and data parallel programs. Technical Report TR 97-9, Institute for Software Technology and Parallel Systems, Univ. of Vienna, Vienna, Austria, October 1997."},{"issue":"30","key":"23_CR12","doi-asserted-by":"crossref","first-page":"478","DOI":"10.1109\/TC.1981.1675827","volume":"C","author":"J. A. Fisher","year":"1981","unstructured":"J. A. Fisher. Trace scheduling: A technique for global microcode compaction. IEEE Transactions on Computers, C(30):478\u2013490, July 1981.","journal-title":"IEEE Transactions on Computers"},{"key":"23_CR13","doi-asserted-by":"crossref","unstructured":"J. D. Gee, M. D. Hill, and A. J. Smith. Cache performance of the SPEC92 benchmark suite. In Proceedings of the IEEE Micro, pages 17\u201327, August 1993.","DOI":"10.1109\/40.229711"},{"key":"23_CR14","doi-asserted-by":"crossref","unstructured":"S. Ghosh, M. Martonosi, and S. Malik. Precise Miss Analysis for Program Transformations with Caches of Arbitrary Associativity. In Proceedings of ASPLOS VIII, San Jose, CA, October 1998.","DOI":"10.1145\/291069.291051"},{"issue":"12","key":"23_CR15","doi-asserted-by":"crossref","first-page":"1612","DOI":"10.1109\/12.40842","volume":"38","author":"M. D. Hill","year":"1989","unstructured":"M. D. Hill and A. J. Smith. Evaluating associativity in cpu caches. IEEE Transactions on Computers, 38(12):1612\u20131630, December 1989.","journal-title":"IEEE Transactions on Computers"},{"key":"23_CR16","doi-asserted-by":"crossref","unstructured":"Y. Kang, M. Huang, S.-M. Yoo, Z. Ge, D. Keen, V. Lam, P. Pattnaik, and J. Torrellas. FlexRAM: Toward an advanced intelligent memory system. In International Conference on Computer Design (ICCD), October 1999.","DOI":"10.1109\/ICCD.1999.808425"},{"key":"23_CR17","doi-asserted-by":"crossref","unstructured":"R. L. Mattson, J. Gecsei, D. Slutz, and I. Traiger. Evaluation techniques for storage hierarchies. IBM Systems Journal, 9(2), 1970.","DOI":"10.1147\/sj.92.0078"},{"key":"23_CR18","unstructured":"J. Reilly. SPEC95 Products and Benchmarks. SPEC Newsletter, September 1995."},{"issue":"10","key":"23_CR19","doi-asserted-by":"crossref","first-page":"1223","DOI":"10.1109\/12.467697","volume":"44","author":"R. Saavedra","year":"1995","unstructured":"R. Saavedra and A. Smith. Measuring cache and tlb performance and their effect on benchmark run times. IEEE Transactions on Computers, 44(10):1223\u20131235, October 1995.","journal-title":"IEEE Transactions on Computers"},{"key":"23_CR20","volume-title":"Technical Report CSD 92-715","author":"R. H. Saavedra-Barrera","year":"1992","unstructured":"R. H. Saavedra-Barrera and A. J. Smith. Analysis of benchmark characteristics and benchmark performance prediction. Technical Report CSD 92-715, Computer Science Division, UC Berkeley, 1992."},{"issue":"12","key":"23_CR21","doi-asserted-by":"crossref","first-page":"1659","DOI":"10.1109\/12.40845","volume":"38","author":"R. H. Saavedra-Barrera","year":"1989","unstructured":"R. H. Saavedra-Barrera, A. J. Smith, and E. Miya. Machine characterization based on an abstract high-level language machine. IEEE Transactions on Computers, 38(12):1659\u20131679, December 1989.","journal-title":"IEEE Transactions on Computers"},{"key":"23_CR22","doi-asserted-by":"crossref","unstructured":"V. Sarkar. Determining average program execution times and their variance. In Proceedings of the ACM SIGPLAN Conference on Programming Languages Design and Implementation\u2019 89, pages 298\u2013312, Portland, Oregon, July 1989.","DOI":"10.1145\/73141.74845"},{"key":"23_CR23","doi-asserted-by":"crossref","unstructured":"R. A. Sugumar and S. G. Abraham. Set-associative cache simulation using generalized binomial trees. ACM Trans. Comp. Sys., 13(1), 1995.","DOI":"10.1145\/200912.200918"},{"key":"23_CR24","doi-asserted-by":"crossref","unstructured":"J. G. Thompson and A. J. Smith. Efficient (stack) algorithms for analysis of write-back and sector memories. ACM Transactions on Computer Systems, 7(1), 1989.","DOI":"10.1145\/58564.59296"},{"key":"23_CR25","doi-asserted-by":"crossref","unstructured":"W.-H. Wang and J.-L. Baer. Efficient trace-driven simulation methods for cache performance analysis. ACM Transactions on Computer Systems, 9(3), 1991.","DOI":"10.1145\/128738.128740"}],"container-title":["Lecture Notes in Computer Science","Languages and Compilers for Parallel Computing"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-44905-1_23","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,2]],"date-time":"2019-05-02T00:26:30Z","timestamp":1556756790000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-44905-1_23"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2000]]},"ISBN":["9783540678588","9783540449058"],"references-count":25,"URL":"https:\/\/doi.org\/10.1007\/3-540-44905-1_23","relation":{},"ISSN":["0302-9743"],"issn-type":[{"type":"print","value":"0302-9743"}],"subject":[],"published":{"date-parts":[[2000]]}}}