{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,26]],"date-time":"2025-10-26T14:12:01Z","timestamp":1761487921848},"publisher-location":"Berlin, Heidelberg","reference-count":30,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540426738"},{"type":"electronic","value":"9783540454496"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2001]]},"DOI":"10.1007\/3-540-45449-7_29","type":"book-chapter","created":{"date-parts":[[2007,9,21]],"date-time":"2007-09-21T11:54:26Z","timestamp":1190375666000},"page":"416-434","source":"Crossref","is-referenced-by-count":25,"title":["Embedded Software in Network Processors \u2014 Models and Algorithms"],"prefix":"10.1007","author":[{"given":"Lothar","family":"Thiele","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Samarjit","family":"Chakraborty","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Matthias","family":"Gries","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alexander","family":"Maxiaguine","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jonas","family":"Greutert","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2001,9,27]]},"reference":[{"issue":"3","key":"29_CR1","doi-asserted-by":"publisher","first-page":"310","DOI":"10.1109\/90.779197","volume":"7","author":"R. Agrawal","year":"1999","unstructured":"R. Agrawal, R. L. Cruz, C. Okino, and R. Rajan. Performance bounds for flow control protocols. IEEE\/ACM Transactions on Networking, 7(3):310\u2013323, 1999.","journal-title":"IEEE\/ACM Transactions on Networking"},{"key":"29_CR2","doi-asserted-by":"publisher","first-page":"173","DOI":"10.1007\/BF01094342","volume":"8","author":"N. Audsley","year":"1995","unstructured":"N. Audsley, A. Burns, M. Richardson, and A. Wellings. Fixed priority preemptive scheduling: A historical perspective. Real-Time Systems, 8:173\u2013198, 1995.","journal-title":"Real-Time Systems"},{"key":"29_CR3","volume-title":"Synchronization and Linearity","author":"F. Baccelli","year":"1992","unstructured":"F. Baccelli, G. Cohen, G.J. Olsder, and J.-P. Quadrat. Synchronization and Linearity. John Wiley, Sons, New York, 1992."},{"key":"29_CR4","unstructured":"S.K. Baruah. Dynamic-and static-priority scheduling of recurring real-time tasks, 2001. To appear in Real-Time Systems."},{"key":"29_CR5","unstructured":"A. Bavier and L. Peterson. BERT: A scheduler for best effort and real-time tasks. Technical Report TR-602-99, Department of Computer Science, Princeton University, 2001. Revised in January 2001."},{"issue":"1","key":"29_CR6","doi-asserted-by":"publisher","first-page":"23","DOI":"10.1023\/A:1008899229802","volume":"3","author":"T. Blickle","year":"1998","unstructured":"T. Blickle, J. Teich, and L. Thiele. System-level synthesis using evolutionary algorithms. Design Automation for Embedded Systems, 3(1):23\u201358, 1998.","journal-title":"Design Automation for Embedded Systems"},{"key":"29_CR7","doi-asserted-by":"crossref","unstructured":"J.Y. Le Boudec. Application of network calculus to guaranteed service networks. IEEE Trans on Information theory, 44(3), May 1998.","DOI":"10.1109\/18.669170"},{"key":"29_CR8","series-title":"Lect Notes Comput Sci","doi-asserted-by":"crossref","DOI":"10.1007\/3-540-45318-0","volume-title":"Network Calculus-A Theory of Deterministic Queuing Systems for the Internet","author":"J.Y. Boudec Le","year":"2001","unstructured":"J.Y. Le Boudec and P. Thiran. Network Calculus-A Theory of Deterministic Queuing Systems for the Internet. LNCS 2050, Springer Verlag, 2001."},{"key":"29_CR9","unstructured":"G.C. Buttazzo. Hard Real-Time Computing Systems-Predictable Scheduling Algorithms and Applications. Kluwer Academic Publishers, 1997."},{"issue":"10","key":"29_CR10","doi-asserted-by":"publisher","first-page":"1035","DOI":"10.1109\/12.805154","volume":"48","author":"G.C. Buttazzo","year":"1999","unstructured":"G.C. Buttazzo and F. Sensini. Optimal deadline assignment for scheduling soft aperiodic tasks in hard real-time environments. IEEE Transactions on Computers, 48(10):1035\u20131052, 1999.","journal-title":"IEEE Transactions on Computers"},{"key":"29_CR11","series-title":"Lect Notes Comput Sci","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-44634-6_5","volume-title":"Proc. 7th International Workshop on Algorithms and Data Structures (WADS)","author":"S. Chakraborty","year":"2001","unstructured":"S. Chakraborty, T. Erlebach, and L. Thiele. On the complexity of scheduling conditional real-time code. In Proc. 7th International Workshop on Algorithms and Data Structures (WADS), LNCS 2125, 2001."},{"key":"29_CR12","doi-asserted-by":"publisher","first-page":"114","DOI":"10.1109\/18.61109","volume":"371","author":"R.L. Cruz","year":"1991","unstructured":"R.L. Cruz. A calculus for network delay. IEEE Trans. Information Theory, 37(1):114\u2013141, 1991.","journal-title":"IEEE Trans. Information Theory"},{"key":"29_CR13","volume-title":"Multi-objective optimization using evolutionary algorithms","author":"K. Deb","year":"2001","unstructured":"K. Deb. Multi-objective optimization using evolutionary algorithms. John Wiley, Chichester, 2001."},{"issue":"1","key":"29_CR14","doi-asserted-by":"publisher","first-page":"2","DOI":"10.1109\/90.836474","volume":"8","author":"D. Decasper","year":"2000","unstructured":"D. Decasper, Z. Dittia, G. M. Parulkar, and B. Plattner. Router plugins: A software architecture for next-generation routers. IEEE\/ACM Transactions on Networking, 8(1):2\u201315, 2000.","journal-title":"IEEE\/ACM Transactions on Networking"},{"issue":"1","key":"29_CR15","first-page":"3","volume":"1","author":"A. Demers","year":"1990","unstructured":"A. Demers, S. Keshav, and S. Shenkar. Analysis and simulation of a fair queueing algorithm. Journal of Internetworking Research and Experience, 1(1):3\u201326, 1990.","journal-title":"Journal of Internetworking Research and Experience"},{"issue":"3","key":"29_CR16","doi-asserted-by":"publisher","first-page":"263","DOI":"10.1145\/354871.354874","volume":"18","author":"E. Kohler","year":"2000","unstructured":"E. Kohler, R. Morris, B. Chen, J. Jannotti, and M.F. Kaashoek. The Click modular router. ACM Transactions on Computer Systems, 18(3):263\u2013297, 2000.","journal-title":"ACM Transactions on Computer Systems"},{"key":"29_CR17","doi-asserted-by":"crossref","unstructured":"J. Lehoczky, L. Sha, and Y. Ding. The rate monotonic scheduling algorithm. In Proc. IEEE Real-Time Systems Symposium, pages 166\u2013171, 1989.","DOI":"10.1109\/REAL.1989.63567"},{"issue":"1","key":"29_CR18","doi-asserted-by":"publisher","first-page":"46","DOI":"10.1145\/321738.321743","volume":"20","author":"C. Liu","year":"1973","unstructured":"C. Liu and J. Layland. Scheduling algorithms for multiprogramming in hard realtime environment. Journal of the ACM, 20(1):46\u201361, 1973.","journal-title":"Journal of the ACM"},{"issue":"2","key":"29_CR19","doi-asserted-by":"publisher","first-page":"51","DOI":"10.1109\/54.844334","volume":"17","author":"L. Thiele","year":"2000","unstructured":"L. Thiele M. Eisenring, E. Zitzler. Handling conflicting criteria in embedded system design. IEEE Design &Test of Computers, 17(2):51\u201359, 2000.","journal-title":"IEEE Design &Test of Computers"},{"key":"29_CR20","volume-title":"Synthesis and Optimization of Digital Circuits","author":"G. Micheli De","year":"1994","unstructured":"G. De Micheli. Synthesis and Optimization of Digital Circuits. McGraw-Hill International Editions, New York, 1994."},{"issue":"10","key":"29_CR21","doi-asserted-by":"publisher","first-page":"635","DOI":"10.1109\/32.637146","volume":"23","author":"A. K. Mok","year":"1997","unstructured":"A. K. Mok and D. Chen. A multiframe model for real-time tasks. IEEE Transactions on Software Engineering, 23(10):635\u2013645, 1997.","journal-title":"IEEE Transactions on Software Engineering"},{"key":"29_CR22","unstructured":"The Moses project homepage. http:\/\/www.tik.ee.ethz.ch\/moses\/ ."},{"key":"29_CR23","unstructured":"M. Naedele, L. Thiele, and M. Eisenring. General task and resource models for processor task scheduling, 1998. TIK Report 45, ETH Z\u00fcrich."},{"key":"29_CR24","doi-asserted-by":"crossref","unstructured":"M. Naedele, L. Thiele, and M. Eisenring. Characterizing variable task releases and processor capacities. In Proceedings of the 14th IFAC World Congress, 1999.","DOI":"10.1016\/S1474-6670(17)57453-4"},{"issue":"3","key":"29_CR25","doi-asserted-by":"publisher","first-page":"344","DOI":"10.1109\/90.234856","volume":"1","author":"A. K. Parekh","year":"1993","unstructured":"A. K. Parekh and R. G. Gallager. A generalized processor sharing approach to flow control in integrated services networks: the single-node case. IEEE\/ACM Transactions on Networking, 1(3):344\u2013357, 1993.","journal-title":"IEEE\/ACM Transactions on Networking"},{"key":"29_CR26","doi-asserted-by":"crossref","unstructured":"S. Prakash and A. C. Parker. Synthesis of application-specific multiprocessor systems including memory components. In Proc. IEEE Application Specific Array Processors, 1992.","DOI":"10.1109\/ASAP.1992.218577"},{"key":"29_CR27","doi-asserted-by":"crossref","unstructured":"X. Qie, A. Bavier, L. Peterson, and S. Karlin. Scheduling computations on a software-based router. In Proc. SIGMETRICS, 2001.","DOI":"10.1145\/378420.378425"},{"key":"29_CR28","doi-asserted-by":"crossref","unstructured":"S. Shenker and J. Wroclawski. General characterization parameters for integrated service network elements. RFC 2215, IETF, September 1997.","DOI":"10.17487\/rfc2215"},{"key":"29_CR29","unstructured":"L. Thiele, S. Chakraborty, and M. Naedele. Real-time calculus for scheduling hard real-time systeme. In Proc. IEEE Internation Conference on Circuits and Systems, 2000."},{"issue":"4","key":"29_CR30","doi-asserted-by":"publisher","first-page":"452","DOI":"10.1109\/92.863627","volume":"8","author":"E. Zitzler","year":"2000","unstructured":"E. Zitzler, J. Teich, and S. S. Bhattacharyya. Evolutionary algorithms for the synthesis of embedded software. IEEE Transactions on VLSI Systems, 8(4):452\u2013456, August 2000.","journal-title":"IEEE Transactions on VLSI Systems"}],"container-title":["Lecture Notes in Computer Science","Embedded Software"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-45449-7_29","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,3]],"date-time":"2019-05-03T02:33:40Z","timestamp":1556850820000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-45449-7_29"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2001]]},"ISBN":["9783540426738","9783540454496"],"references-count":30,"URL":"https:\/\/doi.org\/10.1007\/3-540-45449-7_29","relation":{},"ISSN":["0302-9743"],"issn-type":[{"type":"print","value":"0302-9743"}],"subject":[],"published":{"date-parts":[[2001]]}}}