{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,28]],"date-time":"2025-10-28T00:26:45Z","timestamp":1761611205407},"publisher-location":"Berlin, Heidelberg","reference-count":16,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540439974"},{"type":"electronic","value":"9783540456575"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2002]]},"DOI":"10.1007\/3-540-45657-0_12","type":"book-chapter","created":{"date-parts":[[2007,5,19]],"date-time":"2007-05-19T14:59:43Z","timestamp":1179586783000},"page":"151-165","source":"Crossref","is-referenced-by-count":37,"title":["Property Checking via Structural Analysis"],"prefix":"10.1007","author":[{"given":"Jason","family":"Baumgartner","sequence":"first","affiliation":[]},{"given":"Andreas","family":"Kuehlmann","sequence":"additional","affiliation":[]},{"given":"Jacob","family":"Abraham","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2002,9,20]]},"reference":[{"key":"12_CR1","doi-asserted-by":"crossref","unstructured":"Armin Biere, Alessandro Cimatti, Edmund M. Clarke, and Yunshan Zhu. Symbolic model checking without BDDs. In 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems, March 1999.","DOI":"10.21236\/ADA360973"},{"key":"12_CR2","doi-asserted-by":"crossref","unstructured":"J. R. Burch, E. M. Clarke, D. E. Long, K. L. McMillan, and D. L. Dill. Symbolic model checking for sequential circuit verification. IEEE Transactions on Computer-Aided Design, 13(4), April 1994.","DOI":"10.1109\/43.275352"},{"key":"12_CR3","doi-asserted-by":"crossref","unstructured":"H. Cho, G. Hachtel, E. Macii, B. Pleisser, and F. Somenzi. Algorithms for approximate FSM traversal based on state space decomposition. IEEE Transactions on Computer-Aided Design, 15(12), Dec. 1996.","DOI":"10.1109\/43.552080"},{"key":"12_CR4","unstructured":"O. Coudert, C. Berthet, and J. C. Madre. Verification of sequential machines using Boolean functional vectors. In IMEC-IFIP International Workshop on Applied Formal Methods for Correct VLSI Design, Nov. 1989."},{"key":"12_CR5","doi-asserted-by":"crossref","unstructured":"Luca de Alfaro, Thomas A. Henzinger, and Freddy Y. C. Mang. Detecting errors before reaching them. In Computer-Aided Verification, July 2000.","DOI":"10.1007\/10722167_17"},{"key":"12_CR6","doi-asserted-by":"crossref","unstructured":"Thomas Filkorn. Functional extensions of symbolic model checking. In Computer-Aided Verification, June 1991.","DOI":"10.1007\/3-540-55179-4_22"},{"key":"12_CR7","unstructured":"Malay K. Ganai. Algorithms for Efficient State Space Search. PhD thesis, University of Texas at Austin, May 2001."},{"key":"12_CR8","doi-asserted-by":"crossref","unstructured":"Youpyo Hong, Peter A. Beerel, Jerry R. Burch, and Kenneth L. McMillan. Safe BDD minimization using don\u2019t cares. In Proc. 34th ACM\/IEEE Design Automation Conference, June 1997.","DOI":"10.1109\/DAC.1997.597145"},{"key":"12_CR9","doi-asserted-by":"crossref","unstructured":"Andreas Kuehlmann and Jason Baumgartner. Transformation-based verification using generalized retiming. In Computer-Aided Verification, July 2001.","DOI":"10.1007\/3-540-44585-4_10"},{"key":"12_CR10","doi-asserted-by":"crossref","unstructured":"Andreas Kuehlmann, Malay K. Ganai, and Viresh Paruthi. Circuit-based Boolean reasoning. In Proc. 38th ACM\/IEEE Design Automation Conference, June 2001.","DOI":"10.1145\/378239.378470"},{"key":"12_CR11","doi-asserted-by":"crossref","unstructured":"Robert P. Kurshan. Computer-Aided Verification of Coordinating Processes. Princeton University Press, 1994.","DOI":"10.1515\/9781400864041"},{"key":"12_CR12","doi-asserted-by":"crossref","unstructured":"In-Ho Moon, Gary D. Hachtel, and Fabio Somenzi. Border-block triangular form and conjunction schedule in image computation. In Formal Methods in Computer-Aided Design, Nov. 2000.","DOI":"10.1007\/3-540-40922-X_6"},{"key":"12_CR13","doi-asserted-by":"crossref","unstructured":"Mary Sheeran, Satnam Singh, and Gunnar Stalmarck. Checking safety properties using induction and a SAT-solver. In Formal Methods in Computer-Aided Design, Nov. 2000.","DOI":"10.1007\/3-540-40922-X_8"},{"key":"12_CR14","doi-asserted-by":"crossref","unstructured":"Poul F. Williams, Armin Biere, Edmund M. Clarke, and Anubhav Gupta. Combining decision diagrams and SAT procedures for efficient symbolic model checking. In Computer-Aided Verification, July 2000.","DOI":"10.1007\/10722167_13"},{"key":"12_CR15","doi-asserted-by":"crossref","unstructured":"C. Han Yang and David L. Dill. Validation with guided search of the state space. In Proc. 35th ACM\/IEEE Design Automation Conference, June 1998.","DOI":"10.1145\/277044.277201"},{"key":"12_CR16","doi-asserted-by":"crossref","unstructured":"Jun Yuan, Jian Shen, Jacob Abraham, and Adnan Aziz. On combining formal and informal verification. In Computer-Aided Verification, June 1997.","DOI":"10.1007\/3-540-63166-6_37"}],"container-title":["Lecture Notes in Computer Science","Computer Aided Verification"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-45657-0_12","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,4,28]],"date-time":"2019-04-28T05:21:11Z","timestamp":1556428871000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-45657-0_12"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002]]},"ISBN":["9783540439974","9783540456575"],"references-count":16,"URL":"https:\/\/doi.org\/10.1007\/3-540-45657-0_12","relation":{},"ISSN":["0302-9743"],"issn-type":[{"type":"print","value":"0302-9743"}],"subject":[],"published":{"date-parts":[[2002]]}}}