{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,31]],"date-time":"2025-03-31T04:49:39Z","timestamp":1743396579141},"publisher-location":"Berlin, Heidelberg","reference-count":16,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540440499"},{"type":"electronic","value":"9783540457060"}],"license":[{"start":{"date-parts":[[2002,1,1]],"date-time":"2002-01-01T00:00:00Z","timestamp":1009843200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2002]]},"DOI":"10.1007\/3-540-45706-2_120","type":"book-chapter","created":{"date-parts":[[2007,10,7]],"date-time":"2007-10-07T05:37:18Z","timestamp":1191735438000},"page":"849-859","update-policy":"http:\/\/dx.doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":4,"title":["Performance Scalability of Multimedia Instruction Set Extensions"],"prefix":"10.1007","author":[{"given":"D.","family":"Cheresiz","sequence":"first","affiliation":[]},{"given":"B.","family":"Juurlink","sequence":"additional","affiliation":[]},{"given":"S.","family":"Vassiliadis","sequence":"additional","affiliation":[]},{"given":"H.","family":"Wijshoff","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2002,8,20]]},"reference":[{"key":"120_CR1","doi-asserted-by":"crossref","unstructured":"D. Burger and T.M. Austin. The SimpleScalar Tool Set, Version 2.0. Technical Report 1342, Univ. of Wisconsin-Madison, Comp. Sci. Dept., 1997.","DOI":"10.1145\/268806.268810"},{"key":"120_CR2","unstructured":"Jesus Corbal, Mateo Valero, and Roger Espasa. Exploiting a New Level of DLP in Multimedia Applications. In MICRO 32, 1999."},{"key":"120_CR3","unstructured":"M. Gries. The Impact of Recent DRAM Architectures on Embedded Systems Performance. In EUROMICRO 26, 2000."},{"key":"120_CR4","unstructured":"L. Gwennap. AltiVec Vectorizes PowerPC. Microprocessor Report, 12(6), 1998."},{"key":"120_CR5","unstructured":"J.L. Hennessy and D.A. Patterson. Computer Architecture-A Quantitative Approach. Morgan Kaufmann, second edition, 1996."},{"key":"120_CR6","unstructured":"Kai Hwang and Faye A. Briggs. Computer Architecture and Parallel Processing. McGraw-Hill, second edition, 1984."},{"key":"120_CR7","unstructured":"PC SDRAM Specification, Rev 1.7. Intel Corp., November 1999."},{"key":"120_CR8","unstructured":"B. Juurlink, D. Tcheressiz, S. Vassiliadis, and H. Wijshoff. Implementation and Evaluation of the Complex Streamed Instruction Set. In Int. Conf. on Parallel Architectures and Compilation Techniques (PACT), 2001."},{"issue":"2","key":"120_CR9","doi-asserted-by":"publisher","first-page":"35","DOI":"10.1109\/40.918001","volume":"21","author":"B. Khailany","year":"2001","unstructured":"B. Khailany, W.J. Dally, U.J. Kapasi, P. Mattson, J. Namkoong, J.D. Owens, B. Towles, A. Chang, and S. Rixner. Imagine: Media Processing With Streams. IEEE Micro, 21(2):35\u201347, 2001.","journal-title":"IEEE Micro"},{"key":"120_CR10","unstructured":"C. Lee, M. Potkonjak, and W.H. Mangione-Smith. MediaBench: A Tool for Evaluating and Synthesizing Multimedia and Communication Systems. In MICRO 30, 1997."},{"key":"120_CR11","doi-asserted-by":"crossref","unstructured":"S. Palacharla, N.P. Jouppi, and J.E. Smith. Complexity-Effective Superscalar Processors. In ISCA\u201997, 1997.","DOI":"10.1145\/264107.264201"},{"key":"120_CR12","doi-asserted-by":"crossref","unstructured":"Alex Peleg, Sam Wilkie, and Uri Weiser. Intel MMX for Multimedia PCs. Communications of the ACM, 40(1):24\u201338, January 1997.","DOI":"10.1145\/242857.242865"},{"key":"120_CR13","doi-asserted-by":"crossref","unstructured":"P. Ranganathan, S. Adve, and N.P. Jouppi. Performance of Image and Video Processing with General-Purpose Processors and Media ISA Extensions. In ISCA 26, pages 124\u2013135, 1999.","DOI":"10.1145\/307338.300990"},{"key":"120_CR14","doi-asserted-by":"crossref","unstructured":"Shreekant Thakkar and Tom Huff. The Internet Streaming SIMD Extensions. Intel Technology Journal, May 1999.","DOI":"10.1109\/2.809248"},{"key":"120_CR15","doi-asserted-by":"crossref","unstructured":"Marc Tremblay, J. Michael O\u2019Conner, Venkatesh Narayanan, and Lian He. VIS Speeds New Media Processing. IEEE Micro, 16(4):10\u201320, August 1996.","DOI":"10.1109\/40.526921"},{"key":"120_CR16","unstructured":"VIS Software Developer\u2019s Kit. Available at \n                    http:\/\/www.sun.com\/processors\/oem\/vis\/\n                    \n                  ."}],"container-title":["Lecture Notes in Computer Science","Euro-Par 2002 Parallel Processing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-45706-2_120","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,4,20]],"date-time":"2020-04-20T00:16:44Z","timestamp":1587341804000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-45706-2_120"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002]]},"ISBN":["9783540440499","9783540457060"],"references-count":16,"URL":"https:\/\/doi.org\/10.1007\/3-540-45706-2_120","relation":{},"ISSN":["0302-9743"],"issn-type":[{"type":"print","value":"0302-9743"}],"subject":[],"published":{"date-parts":[[2002]]},"assertion":[{"value":"20 August 2002","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"This content has been made available to all.","name":"free","label":"Free to read"}]}}