{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,30]],"date-time":"2025-05-30T14:47:05Z","timestamp":1748616425938,"version":"3.33.0"},"publisher-location":"Berlin, Heidelberg","reference-count":36,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540440499"},{"type":"electronic","value":"9783540457060"}],"license":[{"start":{"date-parts":[[2002,1,1]],"date-time":"2002-01-01T00:00:00Z","timestamp":1009843200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2002]]},"DOI":"10.1007\/3-540-45706-2_71","type":"book-chapter","created":{"date-parts":[[2007,10,7]],"date-time":"2007-10-07T05:37:18Z","timestamp":1191735438000},"page":"522-531","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":4,"title":["Real PRAM Programming"],"prefix":"10.1007","author":[{"given":"Wolfgang J.","family":"Paul","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Peter","family":"Bach","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Michael","family":"Bosch","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J\u00f6rg","family":"Fischer","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"C\u00e9dric","family":"Lichtenau","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jochen","family":"R\u00f6hrig","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2002,8,20]]},"reference":[{"key":"71_CR1","unstructured":"Valiant, L.G.: General Purpose Parallel Architectures. In van Leeuwen, J., ed.: Handbook of Theoretical Computer Science, Vol. A. Elsevier Science Publishers and MIT Press (1990) 943\u2013971"},{"key":"71_CR2","unstructured":"Abolhassan, F., Keller, J., Paul, W.J.: On the Cost-Effectiveness of PRAMs. In: Proceedings of the 3rd IEEE Symposium on Parallel and Distributed Processing. (1991) 2\u20139"},{"key":"71_CR3","doi-asserted-by":"crossref","unstructured":"Gottlieb, A., Grishman, R., Kruskal, C.P., McAuliffe, K.P., Rudolph, L., Snir, M.: The NYU Ultracomputer-Designing an MIMD Shared Memory Parallel Computer. In: IEEE Transactions on Computers, C-32(2). (Feb 1983) 175\u2013189","DOI":"10.1109\/TC.1983.1676201"},{"key":"71_CR4","first-page":"764","volume-title":"nternational Conference on Parallel Processing","author":"G.F. Pfister","year":"1985","unstructured":"Pfister, G.F., Brantley, W.C., George, D.A., Harvey, S.L., Kleinfelder, W.J., McAuliffe, K.P., Melton, E.A., Norton, V.A., Weiss, J.: The IBM Research Parallel Processor Prototype (RP3): Introduction and Architecture. In: International Conference on Parallel Processing, Los Alamitos, Ca., USA, IEEE Computer Society Press (1985) 764\u2013771"},{"key":"71_CR5","unstructured":"Alverson, R., Callahan, D., Cummings, D., Koblenz, B., Porterfield, A., Smith, B.: The Tera computer system. In: Proceedings of the1990 International Conference on Supercomputing. (1990) 1\u20136"},{"key":"71_CR6","doi-asserted-by":"crossref","first-page":"241","DOI":"10.1117\/12.932535","volume":"298","author":"B.J. Smith","year":"1981","unstructured":"Smith, B.J.: Architecture and applications of the HEP multiprocessor computer system. SPIE Real-Time Signal Processing IV 298 (1981) 241\u2013248","journal-title":"SPIE Real-Time Signal Processing IV"},{"key":"71_CR7","doi-asserted-by":"publisher","first-page":"463","DOI":"10.1007\/s002360050181","volume":"36","author":"F. Abolhassan","year":"1999","unstructured":"Abolhassan, F., Keller, J., Paul, W.J.: On the Cost-Effectiveness of PRAMs. In: Acta Informatica 36. Springer-Verlag (1999) 463\u2013487","journal-title":"Acta Informatica"},{"key":"71_CR8","unstructured":"Keller, J., Kessler, C.W., Tr\u00e4ff, J.L.: Practical PRAM Programming. Wiley Interscience Series on Parallel and Distributed Computing (2000)"},{"key":"71_CR9","unstructured":"Valiant, L.G.: Bulk-synchronous parallel computers. In: Parallel Processing and Artificial Intelligence. (1989) 15\u201322"},{"key":"71_CR10","doi-asserted-by":"crossref","unstructured":"Valiant, L.G.: A Bridging Model for Parallel Computation. In: Communications of the ACM. (August 1990) 103\u2013111","DOI":"10.1145\/79173.79181"},{"key":"71_CR11","volume-title":"PhD thesis","author":"F. Abolhassan","year":"1994","unstructured":"Abolhassan, F.: Vergleich von Parallelen Maschinen mit gemeinsamen und verteilten Speichern. PhD thesis, Universit\u00e4t des Saarlandes, Saarbr\u00fccken (1994)"},{"issue":"8","key":"71_CR12","doi-asserted-by":"publisher","first-page":"756","DOI":"10.1093\/comjnl\/36.8.756","volume":"36","author":"F. Abolhassan","year":"1993","unstructured":"Abolhassan, F., Drefenstedt, R., Keller, J., Paul, W.J., Scheerer, D.: On the Physical Design of PRAMs. In: Computer Journal 1993 36(8). (1993) 756\u2013762","journal-title":"Computer Journal"},{"key":"71_CR13","volume-title":"PhD thesis","author":"D. Scheerer","year":"1995","unstructured":"Scheerer, D.: Der Prozessor der SB-PRAM. PhD thesis, Universit\u00e4t des Saarlandes, Saarbr\u00fccken (1995)"},{"key":"71_CR14","series-title":"Lect Notes Comput Sci","doi-asserted-by":"crossref","first-page":"17","DOI":"10.1007\/BFb0020421","volume-title":"Proc. WDAG\u2019 94, 8th Int. Workshop on Distributed Algorithms","author":"J. Keller","year":"1994","unstructured":"Keller, J., Paul, W.J., Scheerer, D.: Realization of PRAMs: Processor Design. In: Proc. WDAG\u2019 94, 8th Int. Workshop on Distributed Algorithms. Springer Lecture Notes in Computer Science No. 857 (1994) 17\u201327"},{"key":"71_CR15","volume-title":"Master\u2019s thesis","author":"T. G\u00f6ler","year":"1996","unstructured":"G\u00f6ler, T.: Der Sortierknoten der SB-PRAM. Master\u2019s thesis, Universit\u00e4t des Saarlandes, Saarbr\u00fccken (1996)"},{"key":"71_CR16","doi-asserted-by":"publisher","first-page":"307","DOI":"10.1016\/0022-0000(91)90005-P","volume":"42","author":"A.G. Ranade","year":"1991","unstructured":"Ranade, A.G.: How to Emulate Shared Memory. In: Journal of Computer and System Sciences 42. (1991) 307\u2013326","journal-title":"Journal of Computer and System Sciences"},{"key":"71_CR17","doi-asserted-by":"crossref","first-page":"71","DOI":"10.7551\/mitpress\/1102.003.0008","volume-title":"Proceedings of the 5th MIT Conference on Advanced Research in VLSI","author":"A.G. Ranade","year":"1988","unstructured":"Ranade, A.G., Bhatt, S.N., Johnson, S.L.: The Fluent Abstract Machine. In: Proceedings of the 5th MIT Conference on Advanced Research in VLSI, Cambridge, MA, MIT Press (1988) 71\u201393"},{"key":"71_CR18","volume-title":"PhD thesis","author":"T. Walle","year":"1997","unstructured":"Walle, T.: Das Netzwerk der SB-PRAM. PhD thesis, Universit\u00e4t des Saarlandes, Saarbr\u00fccken (1997)"},{"issue":"2","key":"71_CR19","doi-asserted-by":"publisher","first-page":"63","DOI":"10.1016\/0020-0190(93)90217-W","volume":"45","author":"D. Cross","year":"1993","unstructured":"Cross, D., Drefenstedt, R., Keller, J.: Reduction of Network Cost and Wiring in Ranade\u2019s Butterfly Routing. In: Information Processing Letters, vol. 45 no. 2. (1993) 63\u201397","journal-title":"Information Processing Letters"},{"key":"71_CR20","first-page":"425","volume":"2","author":"A. J. Formella","year":"1996","unstructured":"A. Formella, J. Keller, T.W.: HPP-A High Performance PRAM. Volume 2. (1996) 425\u2013434","journal-title":"HPP-A High Performance PRAM"},{"key":"71_CR21","volume-title":"Master\u2019s thesis","author":"P. Bach","year":"1996","unstructured":"Bach, P.: Entwurf und Realisierung der Prozessorplatine der SB-PRAM. Master\u2019s thesis, Universit\u00e4t des Saarlandes, Saarbr\u00fccken (1996)"},{"key":"71_CR22","volume-title":"Dissertation","author":"P. Bach","year":"2000","unstructured":"Bach, P.: Schnelle Fertigungsfehlersuche am Beispiel der Prozessorplatine CPULIGHT. Dissertation (paul), Universit\u00e4t des Saarlandes, Saarbr\u00fccken (2000)"},{"key":"71_CR23","volume-title":"Master\u2019s thesis","author":"S. Janocha","year":"2000","unstructured":"Janocha, S.: Design der PCIPro-Karte. Master\u2019s thesis, Universit\u00e4t des Saarlandes, Saarbr\u00fccken (2000)"},{"key":"71_CR24","volume-title":"Diplomarbeit an der universit\u00e4t des saarlandes fb 14","author":"C. Lichtenau","year":"1996","unstructured":"Lichtenau, C.: Entwurf und Realisierung des Speicherboards der SB-PRAM. Diplomarbeit an der universit\u00e4t des saarlandes fb 14 (paul), Universit\u00e4t des Saarlandes, Saarbr\u00fccken (1996)"},{"key":"71_CR25","volume-title":"Dissertation","author":"C. Lichtenau","year":"2000","unstructured":"Lichtenau, C.: Entwurf und Realisierung des Aufbaus und der Testumgebung der SB-PRAM. Dissertation, Universit\u00e4t des Saarlandes, Saarbr\u00fccken (2000)"},{"key":"71_CR26","volume-title":"Diplomarbeit an der Universit\u00e4t des Saarlandes FB 14","author":"J. Fischer","year":"1998","unstructured":"Fischer, J.: Entwurf und Realisierung der Netzwerkplatinen der SB-PRAM. Diplomarbeit an der Universit\u00e4t des Saarlandes FB 14 (paul), Universit\u00e4t des Saarlandes, Saarbr\u00fccken (1998)"},{"key":"71_CR27","volume-title":"PhD thesis","author":"J. Keller","year":"1992","unstructured":"Keller, J.: Zur Realisierbarkeit des PRAM Modelles. PhD thesis, Universit\u00e4t des Saarlandes, Saarbr\u00fccken (1992)"},{"key":"71_CR28","unstructured":"1990, I.S..: Standard test access port and boundary scan architecture. Institute of Electrical and Electronics Engineers (1993)"},{"key":"71_CR29","volume-title":"Dissertation","author":"M. Bosch","year":"2000","unstructured":"Bosch, M.: Fehlermodelle und Tests f\u00fcr das Netzwerk der SB-PRAM. Dissertation, Universit\u00e4t des Saarlandes, Saarbr\u00fccken (2000)"},{"key":"71_CR30","unstructured":"Kessler, C., Seidl, H.: Fork95 Language and Compiler for the SB-PRAM. In: Proceedings of the 5th International Workshop on Compilers for Parallel Computers. (1995) 408\u2013420"},{"key":"71_CR31","volume-title":"Master\u2019s thesis","author":"J. R\u00f6hrig","year":"1996","unstructured":"R\u00f6hrig, J.: Implementierung der P4-Laufzeitbibliothek auf der SB-PRAM. Master\u2019s thesis, Universit\u00e4t des Saarlandes, Saarbr\u00fccken (1996)"},{"key":"71_CR32","unstructured":"Wilson, J.M.: Operating System Data Structures for Shared-Memory MIMD Machines with Fetch-and-Add. PhD thesis, Courant Institute, New York University (1998)"},{"key":"71_CR33","unstructured":"Formella, A., Gr\u00fcn, T., Keller, J., Paul, W., Rauber, T., R\u00fcnger, G.: Scientific applications on the sb-pram. In: Proceedings of International Conference on Multi-Scale Phenomena and their Simulation in Parallel, World Scientific (1997)"},{"key":"71_CR34","doi-asserted-by":"publisher","first-page":"41","DOI":"10.1109\/71.205652","volume":"4","author":"D. Lenoski","year":"1993","unstructured":"Lenoski, D., Laudon, J., Joe, T., Nakahira, D., Stevens, L., Gupta, A., Hennessy, J.: The DASH prototype: Logic overhead and performance. IEEE Transactions on Parallel and Distributed Systems 4 (1993) 41\u201361","journal-title":"IEEE Transactions on Parallel and Distributed Systems"},{"key":"71_CR35","doi-asserted-by":"crossref","unstructured":"Agarwal, A., Bianchini, R., Chaiken, D., Johnson, K., Kranz, D., Kubiatowicz, J., Lim, B.H., Mackenzie, K., Yeung, D.: The MIT Alewife Machine: Architecture and Performance. In: International Symposium on Computer Architecture 1995. (1995)","DOI":"10.1145\/223982.223985"},{"key":"71_CR36","doi-asserted-by":"crossref","unstructured":"Dementiev, R., Klein, M., Paul, W.J.: Performance of MP3D on the SB-PRAM prototype. In: Proc. of the Europar\u201902. (2002)","DOI":"10.1007\/3-540-45706-2_16"}],"container-title":["Lecture Notes in Computer Science","Euro-Par 2002 Parallel Processing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-45706-2_71","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,21]],"date-time":"2025-01-21T12:43:08Z","timestamp":1737463388000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-45706-2_71"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002]]},"ISBN":["9783540440499","9783540457060"],"references-count":36,"URL":"https:\/\/doi.org\/10.1007\/3-540-45706-2_71","relation":{},"ISSN":["0302-9743"],"issn-type":[{"type":"print","value":"0302-9743"}],"subject":[],"published":{"date-parts":[[2002]]},"assertion":[{"value":"20 August 2002","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"This content has been made available to all.","name":"free","label":"Free to read"}]}}