{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,19]],"date-time":"2025-03-19T16:53:08Z","timestamp":1742403188833},"publisher-location":"Berlin, Heidelberg","reference-count":8,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540434092"},{"type":"electronic","value":"9783540459972"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2002]]},"DOI":"10.1007\/3-540-45997-9_12","type":"book-chapter","created":{"date-parts":[[2007,10,27]],"date-time":"2007-10-27T21:46:01Z","timestamp":1193521561000},"page":"149-164","source":"Crossref","is-referenced-by-count":6,"title":["Design Tradeoffs for Embedded Network Processors"],"prefix":"10.1007","author":[{"given":"Tilman","family":"Wolf","sequence":"first","affiliation":[]},{"given":"Mark A.","family":"Franklin","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2002,3,28]]},"reference":[{"key":"12_CR1","unstructured":"ARM Ltd. ARM9E-S-Technical Reference Manual, Dec. 1999. \n                    http:\/\/www.arm.com\n                    \n                  ."},{"key":"12_CR2","doi-asserted-by":"crossref","unstructured":"R. F. Cmelik and D. Keppel. Shade: A fast instruction-set simulator for execution profiling. In Proc. of ACM SIGMETRICS, Nashville, TN, May 1994.","DOI":"10.1145\/183018.183032"},{"key":"12_CR3","doi-asserted-by":"crossref","unstructured":"P. Crowley, M. E. Fiuczynski, J.-L. Baer, and B. N. Bershad. Characterizing processor architectures for programmable network interfaces. In Proc. of 2000 International Conference on Supercomputing, Santa Fe, NM, May 2000.","DOI":"10.1145\/335231.335237"},{"key":"12_CR4","unstructured":"J. Edler and M. D. Hill. Dinero IV Trace-Driven Uniprocessor Cache Simulator, 1998. \n                    http:\/\/www.neci.nj.nec.com\/homepages\/edler\/d4\/\n                    \n                  . 158"},{"key":"12_CR5","unstructured":"IBM Microelectronics Division. The PowerPC 405TM Core, 1998. \n                    http:\/\/www.chips.ibm.com\/products\/powerpc\/cores\/405cr wp.pdf\n                    \n                  ."},{"key":"12_CR6","unstructured":"MIPS Technologies, Inc. JADE-Embedded MIPS Processor Core, 1998. \n                    http:\/\/www.mips.com\/products\/Jade1030.pdf\n                    \n                  ."},{"key":"12_CR7","doi-asserted-by":"crossref","unstructured":"T. Wolf and M. A. Franklin. CommBench\u2014 a telecommunications benchmark for network processors. In Proc. of IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), pages 154\u2013162, Austin, TX,Apr. 2000.","DOI":"10.1109\/ISPASS.2000.842295"},{"issue":"3","key":"12_CR8","doi-asserted-by":"publisher","first-page":"404","DOI":"10.1109\/49.917702","volume":"19","author":"T. Wolf","year":"2001","unstructured":"T. Wolf and J. S. Turner. Design issues for high performance active routers. IEEE Journal on Selected Areas of Communication, 19(3):404\u2013409, Mar. 2001.","journal-title":"IEEE Journal on Selected Areas of Communication"}],"container-title":["Lecture Notes in Computer Science","Trends in Network and Pervasive Computing \u2014 ARCS 2002"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-45997-9_12","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,2,24]],"date-time":"2019-02-24T17:52:55Z","timestamp":1551030775000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-45997-9_12"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002]]},"ISBN":["9783540434092","9783540459972"],"references-count":8,"URL":"https:\/\/doi.org\/10.1007\/3-540-45997-9_12","relation":{},"ISSN":["0302-9743"],"issn-type":[{"type":"print","value":"0302-9743"}],"subject":[],"published":{"date-parts":[[2002]]}}}