{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,12]],"date-time":"2026-06-12T10:08:09Z","timestamp":1781258889309,"version":"3.54.1"},"publisher-location":"Berlin, Heidelberg","reference-count":16,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"value":"9783540436744","type":"print"},{"value":"9783540478478","type":"electronic"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2002]]},"DOI":"10.1007\/3-540-47847-7_13","type":"book-chapter","created":{"date-parts":[[2007,6,2]],"date-time":"2007-06-02T01:43:29Z","timestamp":1180748609000},"page":"133-145","source":"Crossref","is-referenced-by-count":6,"title":["A Comprehensive Analysis of Indirect Branch Prediction"],"prefix":"10.1007","author":[{"given":"Oliverio J.","family":"Santana","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ayose","family":"Falc\u00f3n","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Enrique","family":"Fern\u00e1ndez","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Pedro","family":"Medina","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Alex","family":"Ram\u00edrez","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Mateo","family":"Valero","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"297","published-online":{"date-parts":[[2002,4,29]]},"reference":[{"key":"13_CR1","doi-asserted-by":"crossref","unstructured":"B. Calder and D. Grunwald. Reducing indirect function call overhead in C++ programs. 21st Symp. on Principles of Programming Languages, 1994.","DOI":"10.1145\/174675.177973"},{"key":"13_CR2","doi-asserted-by":"crossref","unstructured":"B. Calder and D. Grunwald. Fast accurate instruction fetch and branch prediction. 21st Intl. Symp. on Computer Architecture, 1994.","DOI":"10.1109\/ISCA.1994.288166"},{"key":"13_CR3","doi-asserted-by":"crossref","unstructured":"P. Y. Chang, E. Hao and Y. Patt. Target prediction for indirect jumps. 24th Intl. Symp. on Computer Architecture, 1997.","DOI":"10.1145\/264107.264209"},{"key":"13_CR4","doi-asserted-by":"crossref","unstructured":"K. Driesen and U. H\u00f6lzle. Accurate indirect branch prediction. 25th Intl. Symp. on Computer Architecture, 1998.","DOI":"10.1145\/279361.279380"},{"key":"13_CR5","unstructured":"K. Driesen and U. H\u00f6lzle. The cascaded predictor: economical and adaptive branch target prediction. 31st Intl. Symp. on Microarchitecture, 1998."},{"key":"13_CR6","doi-asserted-by":"crossref","unstructured":"K. Driesen and U. H\u00f6lzle. Multi-Stage Cascaded Prediction. 5th Intl. Euro-Par Conf., 1999","DOI":"10.1007\/3-540-48311-X_186"},{"key":"13_CR7","doi-asserted-by":"crossref","unstructured":"D. Kaeli and P. Emma. Branch history table prediction of moving target branches due to subroutine returns. 18th Intl. Symp. on Computer Architecture, 1991.","DOI":"10.1145\/115952.115957"},{"key":"13_CR8","doi-asserted-by":"crossref","unstructured":"J. Lee and A. Smith. Branch prediction strategies and branch target buffer design. IEEE Computer Magazine, 17(1), 1984.","DOI":"10.1109\/MC.1984.1658927"},{"key":"13_CR9","unstructured":"S. McFarling Combining branch predictors. Digital Equipment Corporation, WRL Technical Note TN-36, 1993."},{"key":"13_CR10","doi-asserted-by":"crossref","unstructured":"P. Michaud, A. Seznec and R. Uhlig. Trading conflict and capacity aliasing in conditional branch predictors. 24th Intl. Symp. on Computer Architecture, 1997.","DOI":"10.1145\/264107.264211"},{"key":"13_CR11","doi-asserted-by":"crossref","unstructured":"R. Nair. Dynamic path-based branch correlation. 28th Intl. Symp. on Microarchitecture, 1995.","DOI":"10.1109\/MICRO.1995.476809"},{"key":"13_CR12","doi-asserted-by":"crossref","unstructured":"C. Perleberg and A. Smith. Branch target buffer design and optimization. IEEE Transactions on Computers, 42(4), 1993.","DOI":"10.1109\/12.214687"},{"key":"13_CR13","unstructured":"O. J. Santana, A. Falc\u00f3n, E. Fern\u00e1ndez, P. Medina, A. Ram\u00edrez and M. Valero. Analysis and evaluation of the Multi-Stage Cascaded Predictor. Departamento de Arquitectura de Computadores, UPC, Technical Report DAC-UPC-2001-24, 2001."},{"key":"13_CR14","doi-asserted-by":"crossref","unstructured":"J. Stark, M. Evers and Y. Patt. Variable length path branch prediction. 8th Intl. Conf. on Architectural Support for Programming Languages and Operating Systems, 1998.","DOI":"10.1145\/291069.291042"},{"key":"13_CR15","doi-asserted-by":"crossref","unstructured":"T. Y. Yeh and Y. Patt. Two level adaptive training branch prediction. 24th Intl. Symp. on Microarchitecture, 1991.","DOI":"10.1145\/123465.123475"},{"key":"13_CR16","unstructured":"T. Y. Yeh and Y. Patt. A comprehensive instruction fetch mechanism for a processor supporting speculative execution. 25th Intl. Symp. on Microarchitecture, 1995"}],"container-title":["Lecture Notes in Computer Science","High Performance Computing"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-47847-7_13","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,4,28]],"date-time":"2019-04-28T12:08:09Z","timestamp":1556453289000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-47847-7_13"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002]]},"ISBN":["9783540436744","9783540478478"],"references-count":16,"URL":"https:\/\/doi.org\/10.1007\/3-540-47847-7_13","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"value":"0302-9743","type":"print"},{"value":"1611-3349","type":"electronic"}],"subject":[],"published":{"date-parts":[[2002]]}}}