{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T21:34:37Z","timestamp":1725485677172},"publisher-location":"Berlin, Heidelberg","reference-count":7,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540436744"},{"type":"electronic","value":"9783540478478"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2002]]},"DOI":"10.1007\/3-540-47847-7_26","type":"book-chapter","created":{"date-parts":[[2007,6,2]],"date-time":"2007-06-02T01:43:29Z","timestamp":1180748609000},"page":"301-309","source":"Crossref","is-referenced-by-count":1,"title":["Cache Line Impact on 3D PDE Solvers"],"prefix":"10.1007","author":[{"given":"Masaaki","family":"Kondo","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mitsugu","family":"Iwamoto","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hiroshi","family":"Nakamura","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2002,4,29]]},"reference":[{"key":"26_CR1","doi-asserted-by":"crossref","unstructured":"M. Lam, E. Rothberg and M. Wolf, \u201cThe cache performance and optimizations of Blocked Algorithms\u201d, Proc. ASPLOS-IV, pp. 63\u201374, 1991","DOI":"10.1145\/106972.106981"},{"key":"26_CR2","doi-asserted-by":"crossref","unstructured":"G. Rivera and C.-W. Tseng, \u201cTiling Optimizations for 3D Scientific Computations\u201d, In Proceedings of Supercomputing 2000, November, 2000.","DOI":"10.1109\/SC.2000.10015"},{"key":"26_CR3","doi-asserted-by":"crossref","unstructured":"S. Coleman and K. S. McKinley, \u201cTile size selection using cache organization and data layout\u201d, Proc. of PLDI, June 1995.","DOI":"10.1145\/207110.207162"},{"key":"26_CR4","doi-asserted-by":"crossref","unstructured":"G. Rivera and C.-W. Tseng, \u201cData Transformations for Eliminating Conflict Misses\u201d, In Proceedings of SIGPLAN\u201998 Conference on Programming Language Design and Implementation, June, 1998.","DOI":"10.1145\/277650.277661"},{"key":"26_CR5","doi-asserted-by":"crossref","unstructured":"O. Temam, E. Granston, and W. Jalby, \u201cTo Copy or Not to Copy: A Compile-time technique for assessing when data copying should be used to eliminate cache conflicts\u201d, In Proceedings of Supercomputing\u2019 93, November 1993.","DOI":"10.1145\/169627.169762"},{"key":"26_CR6","doi-asserted-by":"crossref","unstructured":"M.J. Wolfe, D. Maydan, and D.-K Chen, \u201cCombining Loop Transformations Considering Caches and Scheduling\u201d, In Proceedings of the 29th IEE\/ACM International Symposium on Microarchitecture, December 1996.","DOI":"10.1109\/MICRO.1996.566468"},{"key":"26_CR7","doi-asserted-by":"crossref","unstructured":"G. Rivera and C.-W. Tseng, \u201cLocality Optimizatioins for Multi-Level caches\u201d, In Proceedings of Supercomputing\u2019 99, November 1999.","DOI":"10.1145\/331532.331534"}],"container-title":["Lecture Notes in Computer Science","High Performance Computing"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-47847-7_26","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,4,28]],"date-time":"2019-04-28T12:08:12Z","timestamp":1556453292000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-47847-7_26"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002]]},"ISBN":["9783540436744","9783540478478"],"references-count":7,"URL":"https:\/\/doi.org\/10.1007\/3-540-47847-7_26","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2002]]}}}