{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,1,23]],"date-time":"2025-01-23T05:13:09Z","timestamp":1737609189875,"version":"3.33.0"},"publisher-location":"Berlin, Heidelberg","reference-count":18,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540664260"},{"type":"electronic","value":"9783540483199"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1999]]},"DOI":"10.1007\/3-540-48319-5_20","type":"book-chapter","created":{"date-parts":[[2007,11,9]],"date-time":"2007-11-09T04:49:58Z","timestamp":1194583798000},"page":"305-322","source":"Crossref","is-referenced-by-count":1,"title":["Automatic Analysis of Loops to Exploit Operator Parallelism on Reconfigurable Systems"],"prefix":"10.1007","author":[{"given":"Narasimhan","family":"Ramasubramanian","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ram","family":"Subramanian","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Santosh","family":"Pande","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2000,5,12]]},"reference":[{"issue":"4","key":"20_CR1","doi-asserted-by":"publisher","first-page":"491","DOI":"10.1145\/29873.29875","volume":"9","author":"R. Allen","year":"1987","unstructured":"Randy Allen and Ken Kennedy. Automatric tranlation of FORTRAN programs to vector form. ACM Transactions on Programming Languages and Systems, 9(4):491\u2013542, Oct 1987.","journal-title":"ACM Transactions on Programming Languages and Systems"},{"issue":"3","key":"20_CR2","doi-asserted-by":"crossref","first-page":"11","DOI":"10.1109\/2.204677","volume":"26","author":"P. M. Athanas","year":"1993","unstructured":"Peter M. Athanas and Harvey F. Silverman. Processor reconfiguration through instruction-set metamorphosis. IEEE Computer, 26(3):11\u201318, March 1993.","journal-title":"IEEE Computer"},{"key":"20_CR3","volume-title":"Loop transformations for restructuring compilers","author":"U. Banerjee","year":"1994","unstructured":"Utpal Banerjee. Loop Parallelization. Loop transformations for restructuring compilers. Boston: Kluwer Academic, 1994."},{"issue":"1","key":"20_CR4","doi-asserted-by":"publisher","first-page":"91","DOI":"10.1006\/jpdc.1995.1031","volume":"25","author":"G. E. Blelloch","year":"1995","unstructured":"G. E. Blelloch, S. Chatterjee, and M. Zagha. Solving linear recurrences with loop raking. Journal of Parallel and Distributed Computing, 25(1):91\u201397, Feb 1995.","journal-title":"Journal of Parallel and Distributed Computing"},{"key":"20_CR5","doi-asserted-by":"crossref","unstructured":"D. A. Clark and B. L. Hutchings. Supporting FPGA microprocessors through retargettable software tools. In Proceedings of the IEEE Workshop on FPGAs for Custom Computing Machines., pages 195\u2013203, April 1996.","DOI":"10.1109\/FPGA.1996.564836"},{"key":"20_CR6","series-title":"Lect Notes Comput Sci","doi-asserted-by":"publisher","first-page":"46","DOI":"10.1007\/BFb0025870","volume-title":"Proceedings of 7th International Workshop on Languages and Compilers for Parallel Computing","author":"D. Bau","year":"1994","unstructured":"Bau D., Kodukula I., Kotlyar V., Pingali K., and Stodghill P. Solving alignment using elementary linear algebra. In Proceedings of 7th International Workshop on Languages and Compilers for Parallel Computing, pages 46\u201360, June 1994. LNCS 892."},{"key":"20_CR7","doi-asserted-by":"crossref","unstructured":"Kaushik S. D., Huang C.-H., Johnson R. W., and Sadayappan P. An approach to communication-efficient data redistribution. In Proceedings of the 1994 ACM International Conference on Supercomputing, pages 364\u2013373, June 1994.","DOI":"10.1145\/181181.181563"},{"key":"20_CR8","doi-asserted-by":"crossref","unstructured":"High Performance Fortran Forum. High performance fortran language specification, version 1.0. Technical Report CRPC-TR92225, Center for Research on Parallel Computation, Rice University, Houston, TX, 1992. Revised January 1993.","DOI":"10.1145\/174223.158909"},{"issue":"3-4","key":"20_CR9","doi-asserted-by":"publisher","first-page":"283","DOI":"10.1007\/BF00155803","volume":"6","author":"M. Gokhale","year":"1992","unstructured":"M. Gokhale and W. Carlson. An introduction to compilation issues for parallel machines. Journal of Supercomputing, 6(3-4):283\u2013314, Dec 1992.","journal-title":"Journal of Supercomputing"},{"key":"20_CR10","doi-asserted-by":"crossref","unstructured":"Anderson J. and Lam M. Global optimizations for parallelism and locality on scalable paralle machines. In Proceedings of SIGPLAN\u2019 93 conference on Programming Language Design and Implementation, pages 112\u2013125, 1993.","DOI":"10.1145\/155090.155101"},{"key":"20_CR11","doi-asserted-by":"crossref","unstructured":"Tu P. and Padua D. Automatic array privatization. In Proceedings of the Sixth Workshop on Language and Compilers for Parallel Computing, August 1993.","DOI":"10.1007\/3-540-57659-2_29"},{"key":"20_CR12","doi-asserted-by":"crossref","unstructured":"Pande S. S. A compile time partitioning method for doall loops on distributed memory systems. In Proceedings of the 1996 International Conference on Parallel Processing, pages 35\u201344, August 1996.","DOI":"10.1109\/ICPP.1996.538557"},{"key":"20_CR13","unstructured":"Stanford University. The SUIF Library, 1994. This manual is a part of the SUIF compiler documentation set, http:\/\/suif.stanford.edu\/ ."},{"issue":"9","key":"20_CR14","doi-asserted-by":"crossref","first-page":"86","DOI":"10.1109\/2.612254","volume":"30","author":"E. Waingold","year":"1997","unstructured":"Elliot Waingold, Michael Taylor, Devabhaktuni Srikrishna, Vivek Sarkar, Walter Lee, Victor Lee, Jang Kim, Matthew Frank, Peter Finch, Rajeev Barua, Jonathan Babb, Saman Amarasinghe, and Anant Agarwal. Baring it all to software: Raw machines. IEEE Computer, 30(9):86\u201393, September 1997.","journal-title":"IEEE Computer"},{"key":"20_CR15","unstructured":"M. Weinhardt. Compilation and pipeline synthesis for reconfigurable architectures. In \u201cReconfigurable Architectures-High Performance by Configware\u201d (Proceedings of the RAW\u201997), April 1997."},{"key":"20_CR16","doi-asserted-by":"crossref","unstructured":"A. Wenben and G. Brown. A software development system for FPGA-based data acqusition system. In Proceedings of the IEEE Workshop Custom Computing Machines, pages 28\u201337, April 1996.","DOI":"10.1109\/FPGA.1996.564739"},{"key":"20_CR17","doi-asserted-by":"crossref","unstructured":"Michael J. Wirthlin and Brad L. Hutchings. A dynamic instruction set computer. In Proceedings of the IEEE Workshop on FPGAs for Custom Computing Machines, pages 99\u2013107, April 1995.","DOI":"10.1109\/FPGA.1995.477415"},{"key":"20_CR18","unstructured":"Michael Wolfe. High Performance Compilers for Parallel Computing. Addison-Wesley Publishing Company, 1996."}],"container-title":["Lecture Notes in Computer Science","Languages and Compilers for Parallel Computing"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-48319-5_20","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,22]],"date-time":"2025-01-22T05:28:51Z","timestamp":1737523731000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-48319-5_20"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1999]]},"ISBN":["9783540664260","9783540483199"],"references-count":18,"URL":"https:\/\/doi.org\/10.1007\/3-540-48319-5_20","relation":{},"ISSN":["0302-9743"],"issn-type":[{"type":"print","value":"0302-9743"}],"subject":[],"published":{"date-parts":[[1999]]}}}