{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T23:01:47Z","timestamp":1725663707186},"publisher-location":"Berlin, Heidelberg","reference-count":8,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540552109"},{"type":"electronic","value":"9783540467755"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1992]]},"DOI":"10.1007\/3-540-55210-3_218","type":"book-chapter","created":{"date-parts":[[2012,2,26]],"date-time":"2012-02-26T09:54:36Z","timestamp":1330250076000},"page":"607-608","source":"Crossref","is-referenced-by-count":0,"title":["\u039cSPEED: a system for the specification and verification of microprocessors"],"prefix":"10.1007","author":[{"given":"H.","family":"Collavizza","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2005,6,2]]},"reference":[{"key":"50_CR1","unstructured":"Borrione, Camurati, Paillet, Prinetto: \u201cA functional approach to formal hardware verification: The MTI experience\u201d, Proc. IEEE ICCD'88, Port Chester, New York. October 1988."},{"key":"50_CR2","unstructured":"Borrione, Pierre, Salem: \u201cFormal verification of VHDL descriptions in Boyer-Moore: first results\u201d, 1st European Conference on VHDL Methods, Marseille, France, 4\u20137 Sept. 1990."},{"key":"50_CR3","volume-title":"Verification of a Pipelined Microprocessor Using Clio","author":"S. Bickford","year":"1989","unstructured":"Bickford, Srivas: \u201cVerification of a Pipelined Microprocessor Using Clio\u201d, Proc. Work. on \u201cHardware Specification, Verification and Synthesis: Mathematical Aspects\u201d, Cornell University, Ithaca, USA, July 1989"},{"key":"50_CR4","doi-asserted-by":"crossref","unstructured":"Cohn: \u201cA Proof of Correctness of the Viper Microprocessor: The First Level\u201d, in Proc. \u201cVLSI Specification, Verification and Synthesis\u201d, Calgary, Canada, Jan. 1987.","DOI":"10.1007\/978-1-4613-2007-4_2"},{"key":"50_CR5","unstructured":"Collavizza: \u201cFunctional Semantics of Microprocessors at the Micro-program level and Correspondence with the Machine Instruction level\u201d, Proc IEEE EDAC Glasgow, Scotland, 12\u201315 March, 1990."},{"key":"50_CR6","volume-title":"Proc. IFIP 8th Int. Conf. CHDL","author":"P. Camurati","year":"1987","unstructured":"Camurati, Prinetto: \u201cFormal verification of hardware correctness: an introduction\u201d, Proc. IFIP 8th Int. Conf. CHDL, Amsterdam, April 1987 (North Holland)"},{"key":"50_CR7","volume-title":"Technical Report 47","author":"Hunt","year":"1986","unstructured":"Hunt: \u201cFM8501: A Verified Microprocessor\u201d, Technical Report 47, Institute for Computing Science. University of Texas at Austin, Feb. 1986."},{"key":"50_CR8","unstructured":"Paillet: \u201cFunctional Semantics of Microprocessors at the Machine Instruction Level\u201d, Proc. 9th IFIP Int. Conf. CHDL, Washington D.C., USA, June 89 (North Holland)"}],"container-title":["Lecture Notes in Computer Science","STACS 92"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-55210-3_218.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,11,17]],"date-time":"2020-11-17T20:58:16Z","timestamp":1605646696000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-55210-3_218"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1992]]},"ISBN":["9783540552109","9783540467755"],"references-count":8,"URL":"https:\/\/doi.org\/10.1007\/3-540-55210-3_218","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[1992]]}}}