{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T23:04:05Z","timestamp":1725663845139},"publisher-location":"Berlin, Heidelberg","reference-count":12,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540558958"},{"type":"electronic","value":"9783540473060"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1992]]},"DOI":"10.1007\/3-540-55895-0_438","type":"book-chapter","created":{"date-parts":[[2012,2,26]],"date-time":"2012-02-26T10:42:51Z","timestamp":1330252971000},"page":"411-416","source":"Crossref","is-referenced-by-count":0,"title":["Very high speed vectorial processors using serial multiport memory as data memory"],"prefix":"10.1007","author":[{"given":"A.","family":"Mzoughi","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Lalam","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"D.","family":"Litaize","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2005,5,29]]},"reference":[{"key":"48_CR1","unstructured":"Kenneth E. Batcher, \u201cDesign of a Massively Parallel Processor\u201d, pp.104\u201308, Tutorial Supercomputers design and applications Kai Hwang Computer Society Press, 1984."},{"key":"48_CR2","unstructured":"Burton J. Smith, \u201cArchitecture and applications of the Hep Multiprocessor Computer System\u201d, pp. 231\u2013238, Tutorial Supercomputers Design and Applications Kai Hwang Computer Society Press, 1984."},{"key":"48_CR3","unstructured":"Tse-Yun Feng, \u201cA Survey of Interconnection Networks\u201d, pp. 109\u2013124, Tutorial Supercomputer Design and Applications Kai Hwang Computer Society Press, 1984."},{"key":"48_CR4","first-page":"145","volume-title":"Computer Architecture and Parallel Processing","author":"K. Hwang","year":"1984","unstructured":"Kai Hwang and Fay\u00e9 A. Briggs, \u201cComputer Architecture and Parallel Processing\u201d, pp. 145\u2013320, Mc Graw Hill Book Company, New York, 1984."},{"key":"48_CR5","unstructured":"Supercomputers, Class VI Systems, Hardware and Software, pp. 1\u2013168, Elsevier Science Publishers B.V, North Holland, 1986."},{"key":"48_CR6","unstructured":"Clifford N. Arold, \u201c Vector Optimisation on the Cyber 205 \u201d, pp. 179\u2013185, Tutorial Supercomputer Design and Applications Kai Hwang Computer Society Press, 1984."},{"key":"48_CR7","first-page":"35","volume-title":"Interconnection Networks for Large Scale Parallel Processing Theories and case Studies","author":"H. J. Siegel","year":"1985","unstructured":"Howard Jay Siegel, \u201cInterconnection Networks for Large Scale Parallel Processing Theories and case Studies \u201d, pp. 35\u2013173, D.C. Heath and Company, Massachusetts, 1985."},{"key":"48_CR8","first-page":"82","volume-title":"Parallel Computers: Architecture, Programming and Algorithms","author":"RW Hockney","year":"1988","unstructured":"RW Hockney and CR Jesshop, \u201c Parallel Computers: Architecture, Programming and Algorithms \u201d, 2nd ed., pp. 82\u2013205, Bristol: Adam Hilger, Great Britain, 1988.","edition":"2nd ed."},{"issue":"N\u22185","key":"48_CR9","doi-asserted-by":"crossref","first-page":"435","DOI":"10.1109\/TC.1982.1676020","volume":"C-31","author":"Duncan H. H. Lawrie","year":"1982","unstructured":"Duncan H. Lawrie and Chandra R. Vora, \u201c The Prime Memory System For Array Access\u201d pp. 435\u2013442, IEEE Transactions on Computers, vol C-31, N\u2218 5, may 1982.","journal-title":"IEEE Transactions on Computers"},{"issue":"N\u221812","key":"48_CR10","doi-asserted-by":"crossref","first-page":"1145","DOI":"10.1109\/T-C.1975.224157","volume":"C-24","author":"Duncan H. H. Lawrie","year":"1975","unstructured":"Duncan H. Lawrie, \u201c Access and Alignment of data in an Array Processor \u201d, IEEE Transactions Computer, Vol C-24 N\u2218 12, pp. 1145\u20131154, December 1975.","journal-title":"IEEE Transactions Computer"},{"issue":"N\u22182","key":"48_CR11","doi-asserted-by":"crossref","first-page":"232","DOI":"10.1145\/633625.52427","volume":"16","author":"D. Lee","year":"1988","unstructured":"De-lei Lee, \u201cScrambled Storage for Parallel Memory Systems\u201d, Computer Architecture News, Vol. 16, N\u22182, pp. 232\u2013239, May 1988.","journal-title":"Computer Architecture News"},{"issue":"N\u22182","key":"48_CR12","first-page":"70","volume":"20","author":"D. Litaize","year":"1992","unstructured":"D. Litaize, A. Mzoughi, C. Rochange, P. Sainrat, \u201cTowards a Shared-Memory Massively Parallel Multiprocessor\u201d, The 19th ISCA,Vol. 20, N\u2218 2, pp. 70\u201379, May 1992.","journal-title":"The 19th ISCA"}],"container-title":["Lecture Notes in Computer Science","Parallel Processing: CONPAR 92\u2014VAPP V"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-55895-0_438.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,28]],"date-time":"2021-04-28T00:47:04Z","timestamp":1619570824000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-55895-0_438"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1992]]},"ISBN":["9783540558958","9783540473060"],"references-count":12,"URL":"https:\/\/doi.org\/10.1007\/3-540-55895-0_438","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[1992]]}}}