{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T22:57:38Z","timestamp":1725663458324},"publisher-location":"Berlin, Heidelberg","reference-count":23,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540563464"},{"type":"electronic","value":"9783540475385"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1992]]},"DOI":"10.1007\/3-540-56346-6_25","type":"book-chapter","created":{"date-parts":[[2012,2,26]],"date-time":"2012-02-26T06:02:53Z","timestamp":1330236173000},"page":"1-15","source":"Crossref","is-referenced-by-count":1,"title":["From equations to hardware. Towards the systematic mapping of algorithms onto parallel architectures"],"prefix":"10.1007","author":[{"given":"Fran\u00e7ois","family":"Charot","sequence":"first","affiliation":[]},{"given":"Patrice","family":"Frison","sequence":"additional","affiliation":[]},{"given":"Eric","family":"Gautrin","sequence":"additional","affiliation":[]},{"given":"Dominique","family":"Lavenier","sequence":"additional","affiliation":[]},{"given":"Patrice","family":"Quinton","sequence":"additional","affiliation":[]},{"given":"Charles","family":"Wagner","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2005,6,1]]},"reference":[{"issue":"12","key":"1_CR1","doi-asserted-by":"crossref","first-page":"1523","DOI":"10.1109\/TC.1987.5009502","volume":"C-36","author":"M. Annaratone","year":"1987","unstructured":"[AAG*87] M. Annaratone, E. Arnould, T. Gross, H.T. Kung, M. Lam, O. Menzilcioglu, and J.A. Webb. The warp computer: architecture, implementation, and performance. IEEE tr. on Computers, C-36(12):1523\u20131538, December 1987. Systolique, Architecture parallele generale.","journal-title":"IEEE tr. on Computers"},{"key":"1_CR2","unstructured":"R. Airiau, J.-M. Berg\u00e9, V. Olive, and J. Rouillard. VHDL. Du langage \u00e0 la mod\u00e9lisation. Collection Informatique, Presses Polytechniques et Universitaires Romandes, 1990."},{"issue":"79","key":"1_CR3","first-page":"1270","volume":"9","author":"A. Benveniste","year":"1991","unstructured":"A. Benveniste and G. Berry. The Synchronous Approach to Reactive and Real-Time Systems. PIEEE, 9(79):1270\u20131281, sep 1991.","journal-title":"PIEEE"},{"key":"1_CR4","doi-asserted-by":"crossref","unstructured":"[BCC*90] S. Borkar, R. Cohn, G. Cox, T. Gross, H.T. Kung, M. Lam, M. Levine, B. Moore, W. Moore, C. Peterson, J. Susman, J. Sutton, J. Urbanski, and J. Webb. Supporting Systolic and Memory Communication in i Warp. Technical Report, Carnegie Mellon University, 1990.","DOI":"10.1145\/325164.325116"},{"key":"1_CR5","doi-asserted-by":"crossref","unstructured":"P. Boiras, D. Cl\u00e9ment, Th. Despeyroux, J. Incerpi, G. Kahn, B. Lang, and V. Pascual. CENTAUR: the System. Technical Report 777, INRIA, 1987.","DOI":"10.1145\/64135.65005"},{"key":"1_CR6","volume-title":"ASAP'91","author":"C. Dezan","year":"1991","unstructured":"[DGL*91] C. Dezan, E. Gautrin, H. Le Verge, P. Quinton, and Y. Saouter. Synthesis of systolic arrays by equation transformations. In ASAP'91, IEEE, Barcelona, Spain, September 1991."},{"key":"1_CR7","volume-title":"International Workshop Algorithms and Parallel VLSI Architectures II","author":"C. Dezan","year":"1991","unstructured":"C. Dezan, H. Le Verge, P. Quinton, and Y. Saouter. The Alpha du Centaur environment. In P. Quinton and Y. Robert, editors, International Workshop Algorithms and Parallel VLSI Architectures II, North-Holland, Bonas, France, June 1991."},{"key":"1_CR8","unstructured":"P. Frison and D. Lavenier. Experience in the design of parallel processor arrays. In International Workshop on Algorithms and Parallel VLSI Architectures II, Bonas (France), jun 1991."},{"key":"1_CR9","unstructured":"P. Frison and D. Lavenier. A fully integrated systolic spelling co-processor. In VLSI91: International Conference on Very Large Scale Integration, August 1991."},{"issue":"4","key":"1_CR10","doi-asserted-by":"crossref","first-page":"46","DOI":"10.1145\/103085.103090","volume":"34","author":"D. Gall Le","year":"1991","unstructured":"D. Le Gall. MPEG: A Video Standard for Multimedia Applications. Communications of the ACM, 34(4):46\u201358, April 1991.","journal-title":"Communications of the ACM"},{"key":"1_CR11","unstructured":"E. Gautrin and L. Perraudeau. Madmacs: a tool for the layout of regular arrays. In IFIP Workshop on Synthesis, Generation and Portability of Library Blocks for ASIC Design, March 1992."},{"key":"1_CR12","volume-title":"Computer Architecture and Organization","author":"J. P. Hayes","year":"1988","unstructured":"John P. Hayes. Computer Architecture and Organization. Mc Graw Hill, New York, 1988."},{"key":"1_CR13","first-page":"271","volume-title":"Lecture Notes in Computer Science","author":"C. Huizing","year":"1988","unstructured":"C. Huizing, R. Gerth, and W. P. de Roever. Modelling Statecharts behaviour in a fully abstract way. In M. Dauchet and M. Nivat, editors, 13th Colloquium on Trees in Algebra and Programming CAAP'88, Lecture Notes in Computer Science, pages 271\u2013294, Springer Verlag, Nancy, France, March 1988. Volume 299."},{"key":"1_CR14","unstructured":"Dominique Lavenier. MicMacs: un r\u00e9seau systolique lin\u00e9aire programmable pour le traitement des chaines de caract\u00e8res. PhD thesis, Universit\u00e9 de Rennes 1, jun 1989."},{"key":"1_CR15","doi-asserted-by":"crossref","unstructured":"D. Lavenier. A high performance systolic chip for spelling correction. In Euro Asic ' 92, pages 381\u2013384, IEEE computer Society Press, jun 1992.","DOI":"10.1109\/EUASIC.1992.227996"},{"issue":"9","key":"1_CR16","doi-asserted-by":"crossref","first-page":"1321","DOI":"10.1109\/5.97301","volume":"79","author":"P. Guernic Le","year":"1991","unstructured":"Paul Le Guernic, Thierry Gautier, Michel Le Borgne, and Claude Le Maire. Programming real-time applications with Signal. Proceedings of the IEEE, 79(9):1321\u20131336, septembre 1991.","journal-title":"Proceedings of the IEEE"},{"key":"1_CR17","unstructured":"H. Le Verge, C. Mauras, and P. Quinton. A language-oriented approach to the design of systolic chips. In International Workshop on Algorithms and Parallel VLSI Architectures, Pont-\u00e0-Mousson, June 1990. To appear in the Journal of VLSI Signal Processing, 1991."},{"key":"1_CR18","doi-asserted-by":"crossref","first-page":"173","DOI":"10.1007\/BF00925828","volume":"3","author":"H. Verge Le","year":"1991","unstructured":"H. Le Verge, C. Mauris, and P. Quinton. The ALPHA language and its use for the design of systolic arrays. Journal of VLSI Signal Processing, 3:173\u2013182, 1991.","journal-title":"Journal of VLSI Signal Processing"},{"key":"1_CR19","doi-asserted-by":"crossref","unstructured":"T. Mashburn, I. Lui, R. Brown, D. Cheung, G. Lum, and P. Cheng. Datapath: a cmos data path silicon assembler. In IEEE, editor, 23 rd Design Automation Conference, pages 722\u2013729, 1986.","DOI":"10.1109\/DAC.1986.1586170"},{"key":"1_CR20","unstructured":"P. Quinton. The Systematic Design of Systolic Arrays. Technical Report, Microelectronics Center of North Carolina Research Report, July 1984."},{"key":"1_CR21","unstructured":"P. Quinton. Systems of recurrence equations. In Conpar 9S-VAPP V Tutorial, Lyon (France), September 1992."},{"key":"1_CR22","unstructured":"SOLO 1400 Reference Manual. ES2 Publication Unit, European Silicon Structures Limited, Berkshire, United Kingdom, 1990."},{"key":"1_CR23","doi-asserted-by":"crossref","unstructured":"L. Thiele. Compiler techniques for massive parallel architectures. In P. Dewilde, editor, State of the Art in Computer Science, Kluwer Academic Publisher, 1992.","DOI":"10.1007\/978-1-4615-3506-5_4"}],"container-title":["Lecture Notes in Computer Science","Parallel Image Analysis"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-56346-6_25.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,11,17]],"date-time":"2020-11-17T16:03:21Z","timestamp":1605629001000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-56346-6_25"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1992]]},"ISBN":["9783540563464","9783540475385"],"references-count":23,"URL":"https:\/\/doi.org\/10.1007\/3-540-56346-6_25","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[1992]]}}}