{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,27]],"date-time":"2026-03-27T16:58:56Z","timestamp":1774630736293,"version":"3.50.1"},"publisher-location":"Berlin, Heidelberg","reference-count":19,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"value":"9783540567981","type":"print"},{"value":"9783540477419","type":"electronic"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1993]]},"DOI":"10.1007\/3-540-56798-4_185","type":"book-chapter","created":{"date-parts":[[2012,2,26]],"date-time":"2012-02-26T11:36:03Z","timestamp":1330256163000},"page":"441-447","source":"Crossref","is-referenced-by-count":1,"title":["Limitation of connectionism in MLP"],"prefix":"10.1007","author":[{"given":"C. V.","family":"Regueiro","sequence":"first","affiliation":[]},{"given":"S.","family":"Barro","sequence":"additional","affiliation":[]},{"given":"A.","family":"Y\u00e1\u00f1ez","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2005,6,1]]},"reference":[{"key":"70_CR1","unstructured":"L.A. Akers, D.K. Ferry and R.O. Grondin, \u201cSynthetic Neural Systems en VLSI\u201d, in A Introduction to Neural and Electronic Networks, S.F. Zornetzer, J.C. Davis and C. Lau, Eds., Academic Press, pp. 317\u2013337, 1990."},{"key":"70_CR2","doi-asserted-by":"crossref","unstructured":"L.A. Akers and M.R. Walker, \u201cA Limited-Interconnect Synthetic Neural IC\u201d, IEEE Procedings ICNN, San Diego, CA, July 1988.","DOI":"10.1109\/ICNN.1988.23923"},{"key":"70_CR3","doi-asserted-by":"crossref","unstructured":"L.A. Akers, M. Walker, D.K. Ferry and R. O. Grondin, \u201cA limited-interconnect, highly layered synthetic neural architecture\u201d, in VLSI for AI, J.G. Delgado-Frias and W.R. Moore, Eds., Kluwer Academic, 1989.","DOI":"10.1007\/978-1-4613-1619-0_20"},{"key":"70_CR4","doi-asserted-by":"crossref","unstructured":"J. Bailey and D. Hammerstrom, \u201cWhy VLSI Implementations of Associative VLCNs Require Connection Multiplexing\u201d, IEEE Proceedings ICNN, San Diego, CA, July 1988.","DOI":"10.1109\/ICNN.1988.23926"},{"key":"70_CR5","unstructured":"F. Faggin and C. Mead, \u201cVLSI Implementation of Neural Networks\u201d, in An Introduction to Neural and Electronic Networks, S.F. Zornetzer, J.L. Davis and C. Lau, Eds., Academic Press, pp. 275\u2013292, 1990."},{"key":"70_CR6","doi-asserted-by":"crossref","unstructured":"K. Goser, U. Hilleringmann, U. Rueckert and K. Schumacher, \u201cVSLI Technologies for Artificial Neural Networks\u201d, IEEE Micro, pp.28\u201344, 1989.","DOI":"10.1109\/40.42985"},{"key":"70_CR7","doi-asserted-by":"crossref","unstructured":"E.D. Karnin, \u201cA Simple Procedure for Prunning Back-Propagation Trained Neural Networks\u201d, IEEE Transactions on Neural Networks, June 1990.","DOI":"10.1109\/72.80236"},{"issue":"No.3","key":"70_CR8","first-page":"269","volume":"4","author":"J.F. Kolen","year":"1990","unstructured":"J.F. Kolen and J.B. Pollack, \u201cBackPropagation is Sensitive to Inicial Conditions\u201d, Complex Systems, Vol. 4 No. 3, June, pp. 269\u2013280, 1990.","journal-title":"Complex Systems"},{"key":"70_CR9","doi-asserted-by":"crossref","first-page":"2505","DOI":"10.1109\/ICASSP.1989.266976","volume":"4","author":"S.Y. Kung","year":"1989","unstructured":"S.Y. Kung and J.N. Hwang, \u201cA Unifying Algorithm\/Architecture for Artificial Neural Networks\u201d, International Conference on Acoustics, Speech and Signal Processing, Glasgow, Vol. 4, pp. 2505\u20132508, 1989.","journal-title":"International Conference on Acoustics, Speech and Signal Processing, Glasgow"},{"key":"70_CR10","doi-asserted-by":"crossref","unstructured":"M.A.C. Maher, S.P. DeWeerth, M.A. Mahowald and C.A. Mead, \u201cImplementing Neural Architectures Using Analog VLSI Circuits\u201d, IEEE Transactions on Circuits and Systems, May 1989.","DOI":"10.1109\/31.31311"},{"key":"70_CR11","doi-asserted-by":"crossref","unstructured":"T. Markussen, \u201cA New Architectural Approach to Flexible Digital Neural Network Chip Systems\u201d, in VLSI for Artificial Intelligence and Neural Networks, J.G. Delgado-Frias and W.R. Moore, Eds., pp. 315\u2013324, Plenum Press, 1991.","DOI":"10.1007\/978-1-4615-3752-6_31"},{"key":"70_CR12","unstructured":"N. Morgan, editor. \u201cArtificial Neural Networks: Electronic Implementations\u201d, Computer Society Press Technology Series and Computer Society Press of the IEEE, 1990."},{"key":"70_CR13","doi-asserted-by":"crossref","unstructured":"M.C. Mozer and P. Smolensky, \u201cSkeletonization: A technique for trimming the fat from a network via relevance assessment\u201d, in Advances in Neural Information Processing 1, D.S. Touretzky, Ed., Morgan Kaufmann, pp. 107\u2013115, 1989.","DOI":"10.1080\/09540098908915626"},{"key":"70_CR14","doi-asserted-by":"crossref","unstructured":"D. R\u00f6ckmann and C. Moraga, \u201cUsing quadratic perceptrons to reduce interconnection density in multilayer neural networks\u201d, in Lecture Notes in Computer Science 540, Springer Verlag, pp. 86\u201392, 1991.","DOI":"10.1007\/BFb0035881"},{"key":"70_CR15","doi-asserted-by":"crossref","DOI":"10.7551\/mitpress\/5236.001.0001","volume-title":"Parallel Distributed Processing: Explorations in the Microstructures of Cognition","author":"D.E. Rumelhart","year":"1986","unstructured":"D.E. Rumelhart, G.E. Hinton and R.J. Williams, \u201cLearning internal representations by error propagation\u201d, in Parallel Distributed Processing: Explorations in the Microstructures of Cognition, D. E. Rumelhart and J. L. McClelland, Eds., Vol. 1, Ch. 8, Cambridge MA: MIT Press, 1986."},{"key":"70_CR16","first-page":"325","volume":"1","author":"J. Sietsma","year":"1988","unstructured":"J. Sietsma and R.J.F. Dow, \u201cNeural net prunning-Why and how?\u201d, in Proceedings IEEE ICNN, Vol. 1, San Diego CA, pp. 325\u2013332, 1988.","journal-title":"Proceedings IEEE ICNN"},{"key":"70_CR17","doi-asserted-by":"crossref","unstructured":"P. Treleaven, \u201cNeurocomputers\u201d,International Journal of Neurocomputing, Vol. 1, 1989.","DOI":"10.1016\/S0925-2312(89)80014-1"},{"key":"70_CR18","doi-asserted-by":"crossref","unstructured":"P. Treleaven, M. Pacheco and M. Vellasco, \u201cVLSI architectures for Neural Networks\u201d, IEEE Micro, pp. 8\u201327, 1989.","DOI":"10.1109\/40.42984"},{"key":"70_CR19","doi-asserted-by":"crossref","unstructured":"A. Y\u00e1\u00f1ez, S. Barro and A. Bugar\u00edn, \u201cBackpropagation multilayer perceptron: a modular implementation\u201d, in Lecture Notes in Computer Science 540, Springer Verlag, pp. 285\u2013295, 1991.","DOI":"10.1007\/BFb0035905"}],"container-title":["Lecture Notes in Computer Science","New Trends in Neural Computation"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-56798-4_185.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,28]],"date-time":"2021-04-28T00:55:37Z","timestamp":1619571337000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-56798-4_185"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1993]]},"ISBN":["9783540567981","9783540477419"],"references-count":19,"URL":"https:\/\/doi.org\/10.1007\/3-540-56798-4_185","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"value":"0302-9743","type":"print"},{"value":"1611-3349","type":"electronic"}],"subject":[],"published":{"date-parts":[[1993]]}}}