{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T22:57:47Z","timestamp":1725663467862},"publisher-location":"Berlin, Heidelberg","reference-count":15,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540568919"},{"type":"electronic","value":"9783540477792"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1993]]},"DOI":"10.1007\/3-540-56891-3_26","type":"book-chapter","created":{"date-parts":[[2012,2,26]],"date-time":"2012-02-26T06:48:30Z","timestamp":1330238910000},"page":"329-340","source":"Crossref","is-referenced-by-count":0,"title":["Locality and false sharing in coherent-cache parallel graph reduction"],"prefix":"10.1007","author":[{"given":"Andrew J.","family":"Bennett","sequence":"first","affiliation":[]},{"given":"Paul H. J.","family":"Kelly","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2005,5,27]]},"reference":[{"issue":"2","key":"26_CR1","doi-asserted-by":"crossref","first-page":"280","DOI":"10.1109\/ISCA.1988.5238","volume":"16","author":"A. Agarwal","year":"1988","unstructured":"Anant Agarwal, Richard Simoni, John Hennessy, and Mark Horowitz. An evaluation of directory schemes for cache coherence. 15th Annual International Symposium on Computer Architecture, Honolulu, May, in Computer Architecture News, 16(2):280\u2013289, May 1988.","journal-title":"15th Annual International Symposium on Computer Architecture, Honolulu, May, in Computer Architecture News"},{"issue":"4","key":"26_CR2","doi-asserted-by":"publisher","first-page":"273","DOI":"10.1145\/6513.6514","volume":"4","author":"J. Archibald","year":"1986","unstructured":"James Archibald and Jean-Loup Baer. Cache coherence protocols: Evaluation using a multiprocessor simulation model. ACM Transactions on Computer Systems, 4(4):273\u2013298, November 1986.","journal-title":"ACM Transactions on Computer Systems"},{"key":"26_CR3","doi-asserted-by":"crossref","unstructured":"Lennart Augustsson and Thomas Johnsson. Parallel graph reduction with the \u2329gn, G\u232a-machine. In Fourth International Conference on Functional Programming Languages and Computer Architecture, London, September, pages 202\u2013213, 1989.","DOI":"10.1145\/99370.99386"},{"key":"26_CR4","volume-title":"PhD thesis","author":"Andrew J. J. Bennett","year":"1993","unstructured":"Andrew J. Bennett. Parallel graph reduction for shared-memory architectures. PhD thesis, Department of Computing, Imperial College, London, 1993."},{"key":"26_CR5","unstructured":"Andrew J. Bennett and Paul H. J. Kelly. Simulation of multicache parallel graph reduction. In Workshop on Parallel Implementations of Functional Languages, Aachen, Sept, 1992."},{"key":"26_CR6","series-title":"volume 487 of Lecture Notes in Computer Science","doi-asserted-by":"crossref","first-page":"32","DOI":"10.1007\/BFb0032920","volume-title":"European Distributed Memory Conference, Munich, April 1991","author":"L. Borrmann","year":"1991","unstructured":"Lothar Borrmann and Petro Istavrinos. Store coherency in a parallel distributed memory machine. In Arndt Bode, editor, European Distributed Memory Conference, Munich, April 1991, volume 487 of Lecture Notes in Computer Science, pages 32\u201341, Berlin, 1991. Springer-Verlag."},{"key":"26_CR7","first-page":"207","volume-title":"Delayed consistency","author":"M. Dubois","year":"1992","unstructured":"Michel Dubois. Delayed consistency. In Michel Dubois and Shreekant S. Thakkar, editors, Workshop on Scalable Shared Memory Multiprocessors, Seattle, May, pages 207\u2013218, Boston, 1992. Kluwer Academic Publishers."},{"key":"26_CR8","volume-title":"PhD thesis","author":"Benjamin F. F. Goldberg","year":"1988","unstructured":"Benjamin F. Goldberg. Multiprocessor Execution of Functional Programs. PhD thesis, Yale University, New Haven, 1988."},{"issue":"3","key":"26_CR9","doi-asserted-by":"crossref","first-page":"25","DOI":"10.1109\/ISCA.1989.714521","volume":"17","author":"A. Goto","year":"1989","unstructured":"Atsuhiro Goto, Akira Matsumoto, and Evan Tick. Design and performance of a coherent cache for parallel logic programming architectures. 16th Annual International Symposium on Computer Architecture, Jerusalem, May, in Computer Architecture News, 17(3):25\u201333, June 1989.","journal-title":"16th Annual International Symposium on Computer Architecture, Jerusalem, May, in Computer Architecture News"},{"key":"26_CR10","doi-asserted-by":"crossref","unstructured":"Anoop Gupta and Wolf-Dietrich Weber. Cache invalidation patterns in sharedmemory multiprocessors. IEEE Transactions on Computers, To appear, 1992.","DOI":"10.1109\/12.256449"},{"key":"26_CR11","doi-asserted-by":"crossref","unstructured":"Pieter H. Hartel and Koen G. Langendoen. Benchmarking implementations of lazy functional languages. In Proceedings of the Conference, on Functional Programming Langauges and Computer Architecture, Copenhagen, June, 1993.","DOI":"10.1145\/165180.165230"},{"issue":"3","key":"26_CR12","first-page":"276","volume":"13","author":"R. H. Katz","year":"1985","unstructured":"R. H. Katz, S. J. Eggers, D. A. Wood, C. L. Perkins, and R. G. Sheldon. Implementing a cache consistency protocol. 12th Annual International Symposium on Computer Architecture, Boston, June, in Computer Architecture News, 13(3):276\u2013283, June 1985.","journal-title":"12th Annual International Symposium on Computer Architecture, Boston, June, in Computer Architecture News"},{"key":"26_CR13","unstructured":"Koen Langendoen and Dirk-Jan Agterkamp. Cache behaviour of lazy functional programs. In Workshop on Parallel Implementations of Functional Languages, Aachen, Sept, 1992."},{"issue":"4","key":"26_CR14","doi-asserted-by":"publisher","first-page":"321","DOI":"10.1145\/75104.75105","volume":"7","author":"K. Li","year":"1989","unstructured":"Kai Li and Paul Hudak. Memory coherence in shared virtual memory systems. ACM Transactions on Computer Systems, 7(4):321\u2013359, November 1989.","journal-title":"ACM Transactions on Computer Systems"},{"key":"26_CR15","unstructured":"H. L. Muller, K. G. Langendoen, and L. O. Hertzberger. MiG: Simulating parallel functional programs on hierarchal cache architectures. Technical Report CS-92\u201304, Department of Computer Systems, University of Amsterdam, 1992."}],"container-title":["Lecture Notes in Computer Science","PARLE '93 Parallel Architectures and Languages Europe"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-56891-3_26.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,11,17]],"date-time":"2020-11-17T16:06:46Z","timestamp":1605629206000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-56891-3_26"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1993]]},"ISBN":["9783540568919","9783540477792"],"references-count":15,"URL":"https:\/\/doi.org\/10.1007\/3-540-56891-3_26","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[1993]]}}}