{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T23:01:51Z","timestamp":1725663711070},"publisher-location":"Berlin, Heidelberg","reference-count":6,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540570912"},{"type":"electronic","value":"9783540479024"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1993]]},"DOI":"10.1007\/3-540-57091-8_28","type":"book-chapter","created":{"date-parts":[[2012,2,26]],"date-time":"2012-02-26T12:02:10Z","timestamp":1330257730000},"page":"44-51","source":"Crossref","is-referenced-by-count":9,"title":["MONTAGE: An FPGA for synchronous and asynchronous circuits"],"prefix":"10.1007","author":[{"given":"Scott","family":"Hauck","sequence":"first","affiliation":[]},{"given":"Gaetano","family":"Borriello","sequence":"additional","affiliation":[]},{"given":"Steven","family":"Burns","sequence":"additional","affiliation":[]},{"given":"Carl","family":"Ebeling","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2005,6,3]]},"reference":[{"key":"5_CR1","volume-title":"P.h.D. thesis","author":"G. Borriello","year":"1988","unstructured":"G. Borriello. New Interface Specification Methodology and its Application to Transducer Synthesis. P.h.D. thesis, University of California, Berkeley, May 1988. UCB\/CSD 88\/430."},{"key":"5_CR2","unstructured":"E. Brunvand. Implementing self-timed systems with FPGAs. In International Workshop on Field-Programmable Logic and Applications, Oxford, 1991."},{"key":"5_CR3","unstructured":"S. Hauck, G. Borriello, and C. Ebeling. Triptych: An FPGA architecture with integrated logic and routing. In Brown\/MIT Conference on Advanced Research in VLSI and Parallel Systems, March 1992."},{"key":"5_CR4","doi-asserted-by":"crossref","unstructured":"D. Marple and L. Cooke. An MPGA compatible FPGA architecture. In First International ACM\/SIGDA Workshop on Field-Programmable Gate Arrays, Berkeley, 1992.","DOI":"10.1109\/CICC.1992.591107"},{"key":"5_CR5","volume-title":"UT Year of Programming Institute on Concurrent Programming","author":"A. Martin","year":"1990","unstructured":"A. Martin. Programming in VLSI: From communicating processes to delay-insensitive circuits. In C. Hoare, editor, UT Year of Programming Institute on Concurrent Programming. Addison-Wesley, Reading, MA, 1990."},{"key":"5_CR6","doi-asserted-by":"crossref","unstructured":"I. Sutherland. Micropipelines. Communications of the ACM, 32(6), June 1989.","DOI":"10.1145\/63526.63532"}],"container-title":["Lecture Notes in Computer Science","Field-Programmable Gate Arrays: Architecture and Tools for Rapid Prototyping"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-57091-8_28.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,28]],"date-time":"2021-04-28T00:58:07Z","timestamp":1619571487000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-57091-8_28"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1993]]},"ISBN":["9783540570912","9783540479024"],"references-count":6,"URL":"https:\/\/doi.org\/10.1007\/3-540-57091-8_28","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[1993]]}}}